Prof.dr.Godfried-Willem RAES

Course on Experimental Musics: Book 2: Live Electronics for composers and musicians

Hogeschool Gent : Departement Muziek & Drama

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Due to the technical nature of this page, we only have an english language version.

PC-board layout can be found at the bottom of this page.



A hardware midi decoder and parallel convertor


Although nowadays it became fashionable to solve most decoding jobs by throwing one or another microprocessor at it, here we will show that it is still very possible to decode serial data streams such as encountered in Midi completely in hardware. Since the design presented here uses only cheap standard components, this approach as a whole is not only more cost effective but also more reliable in many respects.

We start off by designing the circuitry around the UART (an Intersil 6402 or a Texas Instruments TL16C450 or TL16C550, both in a 'classic' 40 pin DIL package). The purpose of the circuit is to receive serial data (midi, but DMX is also possible with minor changes to the input circuitry) and whenever a specified status byte is received, store the corresponding data byte (or bytes) in separate latches. In the circuit we provided a DIL-switch such that the midi-channel as well as the status byte to which the decoder should react can be set by the user. Of course the binary DIL switch could be replaced with a thumbwheel BCD encoder switch for a more fancy realisation.

The first problem we encounter in the design is that the midi data stream always has the status byte followed by one or two byte. If the data would precede the status byte, the circuitry would be a bit easier. To solve this we decided to shift all incoming bytes continuously in an 8-step shift register. The 74595 chips, each of them handling a single databit, perform this job. In the schematic drawing we recombined all these serial bits back to 8 single bytes using 74574 latches. Since the shift registers lag the incoming data stream by one byte, we used a separate latch for the most recent byte. Thus in total we can go as far as decoding up to 9 bytes. That would only have applications in the area of sysex's and non-standard midi designs, but we show the principle for completeness sake.

If you need only to decode a program change message (1 status and 1 data byte), you can drop all but the first pair of 74574 latches (t and t-1 should remain, the comparator connected to t-1). For note on/off and controller changes, you just need t, t-1 and t-2 and the comparator should be connected to the output of latch t-2, as shown in the circuit diagram.. Data is always available from the latches enabled by the inverted P=Q output from the comparator.

This is the version using a microprocessor and a 16450 UART chip:

The basics of the circuitry around the UART are given in the lower part of the circuit diagram.. There are two version: the 6402 version being the most austere, whereas the 16450 version requires a small data stream on start up to set the parameters in the registers of the chip. This could be handled by a sequential read from a ROM on startup , or, by confining this task to a simple PIC controller. A Parallax BS2 will do fine here. The IRQ line (pin 30 on the 16450 version and pin 19 on the 6402 version) ) is used as the strobe input to the circuit given above. This signal goes high everytime a complete byte is received. Since the shiftregisters used (one register for each bit) are positive edge triggered, we can use this signal directly to shift the data. Since we connect the clocks for the shift and storage register (pins 11 and 12) together, the register states will allways be one clock pulse ahead of the storage registers. The first latch (t0) stores the most recent incoming byte and is also triggered from the rising edge of the IRQ signal. The rising edge of the inverted IRQ signal is used to trigger the latches (t1-....t8) connected to the outputs of the shift registers.

The A0, A1, A2 lines on the 16450/16550 are only used during start up: these are only required after start up if we want to use the FIFO mode for this UART, but that requires a microcontroller of some kind active during the whole data transfer. Since we use very fast hardware to receive and decode the data, there is absolutely no advantage in using FIFO mode here.

The design as presented and tested decodes one 3 byte message, such as note on + velo as well as one 2 byte message, such as program change. The message to which the circuit should react by storing the corresponding data bytes, can be user selected with the binary DIL switches. Note that in the practical realisation, we used discrete transistor invertors instead of TTL inverted as drawn in the circuit. This was done only for board layout considerations.

Ready made boards are available against nominal cost. (ca. 200 Euro for a fully populated UART board). We have used these board in a few of our robots and automated instruments controlled by midi.

The prototype board (scale 200%), using a 6402 UART chip, is drawn below:

Filedate: 2003-09-16

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