' Always make a backup of this file if modifications are carried out.
' Modifications to this file may affect the performance of the compiler.
' Always use NotePad if any edits are carried out, NEVER use a word processor.
'
' 24EP256MC202
' File Author Les Johnson.
' Creation Date 10/11/2013

$ifndef _24EP256MC202_
$define _24EP256MC202_
$define _24E_

' Microcontroller Information
$define _device _24EP256MC202
$define _core 24    ' Core type (24 or 33)
$define _oscdiv 2   ' Fosc division
$define _type _PIC24E ' Device type (_PIC24E, _PIC24F, _PIC24H or _dsPIC33E)
$define _ram 32768    ' Total amount of RAM (in bytes)
$define _code 264162  ' Total amount of code memory (in bytes)
$define _dma_ram 0  ' Amount of DMA RAM (in bytes)
$define _x_start 0x1000  ' Starting address of X RAM
$define _y_start 0x00  ' Starting address of Y RAM (if any)
$define _dma_start 0x00 ' Starting address of DMA RAM (if any)
$define _ports 2    ' Amount of ports
$define _adc 1      ' ADC available (1 or 0)
$define _eeprom 0   ' Amount of on-board eeprom (in bytes)
$define _uart 2     ' Amount of UART peripherals
$define _usb 0      ' USB available (1 or 0)
$define _spi 2      ' Amount of SPI peripherals
$define _i2c 2      ' Amount of I2C peripherals
$define _rtcc 0     ' RTCC available (1 or 0)
$define _pmp 0      ' PMP available (1 or 0)
$define _hpwm 4     ' Amount of Output Compare channels
$define _dac 0      ' Amount of DAC channels
$define _dma 4      ' Amount of DMA peripherals
$define _pps 1      ' PPS available (1 or 0)
$define _block 2   ' Size of the code memory write segment (in 3-byte words)
$define _erase 128   ' Size of the code memory erase segment (in 3-byte words)
'
' Peripheral activation codes
$define _CRC_PROG_V2
$define _COMPARATOR_V3
$define _PPI_PPS_V3

' Special Function Registers (SFRs)
$define _WREG0  0x0
$define _WREG1  0x2
$define _WREG2  0x4
$define _WREG3  0x6
$define _WREG4  0x8
$define _WREG5  0xA
$define _WREG6  0xC
$define _WREG7  0xE
$define _WREG8  0x10
$define _WREG9  0x12
$define _WREG10  0x14
$define _WREG11  0x16
$define _WREG12  0x18
$define _WREG13  0x1A
$define _WREG14  0x1C
$define _WREG15  0x1E
$define _SPLIM  0x20
$define _PCL  0x2E
$define _PCH  0x30
$define _PCLH  0x30
$define _DSRPAG  0x32
$define _DSWPAG  0x34
$define _RCOUNT  0x36
$define _SR  0x42
$define _STATUS  0x42
$define _CORCON  0x44
$define _DISICNT  0x52
$define _TBLPAG  0x54
$define _MSTRPR  0x58
$define _TMR1  0x100
$define _PR1  0x102
$define _T1CON  0x104
$define _TMR2  0x106
$define _TMR3HLD  0x108
$define _TMR2HH  0x108
$define _TMR3  0x10A
$define _PR2  0x10C
$define _PR3  0x10E
$define _T2CON  0x110
$define _T3CON  0x112
$define _TMR4  0x114
$define _TMR5HLD  0x116
$define _TMR4HH  0x116
$define _TMR5  0x118
$define _PR4  0x11A
$define _PR5  0x11C
$define _T4CON  0x11E
$define _T5CON  0x120
$define _IC1CON1  0x140
$define _IC1CON2  0x142
$define _IC1BUF  0x144
$define _IC1TMR  0x146
$define _IC2CON1  0x148
$define _IC2CON2  0x14A
$define _IC2BUF  0x14C
$define _IC2TMR  0x14E
$define _IC3CON1  0x150
$define _IC3CON2  0x152
$define _IC3BUF  0x154
$define _IC3TMR  0x156
$define _IC4CON1  0x158
$define _IC4CON2  0x15A
$define _IC4BUF  0x15C
$define _IC4TMR  0x15E
$define _QEI1CON  0x1C0
$define _QEI1IOC  0x1C2
$define _QEI1STAT  0x1C4
$define _POS1CNTL  0x1C6
$define _POS1CNTH  0x1C8
$define _POS1HLD  0x1CA
$define _VEL1CNT  0x1CC
$define _INT1TMRL  0x1CE
$define _INT1TMRH  0x1D0
$define _INT1HLDL  0x1D2
$define _INT1HLDH  0x1D4
$define _INDX1CNTL  0x1D6
$define _INDX1CNTH  0x1D8
$define _INDX1HLD  0x1DA
$define _QEI1GECL  0x1DC
$define _QEI1ICL  0x1DC
$define _QEI1GECH  0x1DE
$define _QEI1ICH  0x1DE
$define _QEI1LECL  0x1E0
$define _QEI1LECH  0x1E2
$define _I2C1RCV  0x200
$define _I2C1TRN  0x202
$define _I2C1BRG  0x204
$define _I2C1CON  0x206
$define _I2C1STAT  0x208
$define _I2C1ADD  0x20A
$define _I2C1MSK  0x20C
$define _I2C2RCV  0x210
$define _I2C2TRN  0x212
$define _I2C2BRG  0x214
$define _I2C2CON  0x216
$define _I2C2STAT  0x218
$define _I2C2ADD  0x21A
$define _I2C2MSK  0x21C
$define _U1MODE  0x220
$define _U1STA  0x222
$define _U1TXREG  0x224
$define _U1RXREG  0x226
$define _U1BRG  0x228
$define _U2MODE  0x230
$define _U2STA  0x232
$define _U2TXREG  0x234
$define _U2RXREG  0x236
$define _U2BRG  0x238
$define _SPI1STAT  0x240
$define _SPI1CON1  0x242
$define _SPI1CON2  0x244
$define _SPI1BUF  0x248
$define _SPI2STAT  0x260
$define _SPI2CON1  0x262
$define _SPI2CON2  0x264
$define _SPI2BUF  0x268
$define _ADC1BUF0  0x300
$define _ADC1BUF1  0x302
$define _ADC1BUF2  0x304
$define _ADC1BUF3  0x306
$define _ADC1BUF4  0x308
$define _ADC1BUF5  0x30A
$define _ADC1BUF6  0x30C
$define _ADC1BUF7  0x30E
$define _ADC1BUF8  0x310
$define _ADC1BUF9  0x312
$define _ADC1BUFA  0x314
$define _ADC1BUFB  0x316
$define _ADC1BUFC  0x318
$define _ADC1BUFD  0x31A
$define _ADC1BUFE  0x31C
$define _ADC1BUFF  0x31E
$define _AD1CON1  0x320
$define _AD1CON2  0x322
$define _AD1CON3  0x324
$define _AD1CHS123  0x326
$define _AD1CHS0  0x328
$define _AD1CSSH  0x32E
$define _AD1CSSL  0x330
$define _AD1CON4  0x332
$define _CTMUCON1  0x33A
$define _CTMUCON2  0x33C
$define _CTMUICON  0x33E
$define _CRCCON1  0x640
$define _CRCCON2  0x642
$define _CRCXORL  0x644
$define _CRCXORH  0x646
$define _CRCDAT  0x648
$define _CRCDATL  0x648
$define _CRCDATH  0x64A
$define _CRCWDAT  0x64C
$define _CRCWDATL  0x64C
$define _CRCWDATH  0x64E
$define _RPOR0  0x680
$define _RPOR1  0x682
$define _RPOR2  0x684
$define _RPOR3  0x686
$define _RPOR4  0x688
$define _RPINR0  0x6A0
$define _RPINR1  0x6A2
$define _RPINR3  0x6A6
$define _RPINR7  0x6AE
$define _RPINR8  0x6B0
$define _RPINR11  0x6B6
$define _RPINR12  0x6B8
$define _RPINR14  0x6BC
$define _RPINR15  0x6BE
$define _RPINR18  0x6C4
$define _RPINR19  0x6C6
$define _RPINR22  0x6CC
$define _RPINR23  0x6CE
$define _RPINR37  0x6EA
$define _RPINR38  0x6EC
$define _RPINR39  0x6EE
$define _NVMCON  0x728
$define _NVMADR  0x72A
$define _NVMADRU  0x72C
$define _NVMKEY  0x72E
$define _RCON  0x740
$define _OSCCON  0x742
$define _CLKDIV  0x744
$define _PLLFBD  0x746
$define _OSCTUN  0x748
$define _REFOCON  0x74E
$define _PMD1  0x760
$define _PMD2  0x762
$define _PMD3  0x764
$define _PMD4  0x766
$define _PMD6  0x76A
$define _PMD7  0x76C
$define _IFS0  0x800
$define _IFS1  0x802
$define _IFS2  0x804
$define _IFS3  0x806
$define _IFS4  0x808
$define _IFS5  0x80A
$define _IFS6  0x80C
$define _IFS8  0x810
$define _IFS9  0x812
$define _IEC0  0x820
$define _IEC1  0x822
$define _IEC2  0x824
$define _IEC3  0x826
$define _IEC4  0x828
$define _IEC5  0x82A
$define _IEC6  0x82C
$define _IEC8  0x830
$define _IEC9  0x832
$define _IPC0  0x840
$define _IPC1  0x842
$define _IPC2  0x844
$define _IPC3  0x846
$define _IPC4  0x848
$define _IPC5  0x84A
$define _IPC6  0x84C
$define _IPC7  0x84E
$define _IPC8  0x850
$define _IPC9  0x852
$define _IPC12  0x858
$define _IPC14  0x85C
$define _IPC16  0x860
$define _IPC19  0x866
$define _IPC23  0x86E
$define _IPC24  0x870
$define _IPC35  0x886
$define _IPC36  0x888
$define _IPC37  0x88A
$define _INTCON1  0x8C0
$define _INTCON2  0x8C2
$define _INTCON3  0x8C4
$define _INTCON4  0x8C6
$define _INTTREG  0x8C8
$define _OC1CON1  0x900
$define _OC1CON2  0x902
$define _OC1RS  0x904
$define _OC1R  0x906
$define _OC1TMR  0x908
$define _OC2CON1  0x90A
$define _OC2CON2  0x90C
$define _OC2RS  0x90E
$define _OC2R  0x910
$define _OC2TMR  0x912
$define _OC3CON1  0x914
$define _OC3CON2  0x916
$define _OC3RS  0x918
$define _OC3R  0x91A
$define _OC3TMR  0x91C
$define _OC4CON1  0x91E
$define _OC4CON2  0x920
$define _OC4RS  0x922
$define _OC4R  0x924
$define _OC4TMR  0x926
$define _CMSTAT  0xA80
$define _CVRCON  0xA82
$define _CM1CON  0xA84
$define _CM1MSKSRC  0xA86
$define _CM1MSKCON  0xA88
$define _CM1FLTR  0xA8A
$define _CM2CON  0xA8C
$define _CM2MSKSRC  0xA8E
$define _CM2MSKCON  0xA90
$define _CM2FLTR  0xA92
$define _CM3CON  0xA94
$define _CM3MSKSRC  0xA96
$define _CM3MSKCON  0xA98
$define _CM3FLTR  0xA9A
$define _CM4CON  0xA9C
$define _CM4MSKSRC  0xA9E
$define _CM4MSKCON  0xAA0
$define _CM4FLTR  0xAA2
$define _PTGCST  0xAC0
$define _PTGCON  0xAC2
$define _PTGBTE  0xAC4
$define _PTGHOLD  0xAC6
$define _PTGT0LIM  0xAC8
$define _PTGT1LIM  0xACA
$define _PTGSDLIM  0xACC
$define _PTGC0LIM  0xACE
$define _PTGC1LIM  0xAD0
$define _PTGADJ  0xAD2
$define _PTGL0  0xAD4
$define _PTGQPTR  0xAD6
$define _PTGQUE0  0xAD8
$define _PTGQUE1  0xADA
$define _PTGQUE2  0xADC
$define _PTGQUE3  0xADE
$define _PTGQUE4  0xAE0
$define _PTGQUE5  0xAE2
$define _PTGQUE6  0xAE4
$define _PTGQUE7  0xAE6
$define _DMA0CON  0xB00
$define _DMA0REQ  0xB02
$define _DMA0STAL  0xB04
$define _DMA0STAH  0xB06
$define _DMA0STBL  0xB08
$define _DMA0STBH  0xB0A
$define _DMA0PAD  0xB0C
$define _DMA0CNT  0xB0E
$define _DMA1CON  0xB10
$define _DMA1REQ  0xB12
$define _DMA1STAL  0xB14
$define _DMA1STAH  0xB16
$define _DMA1STBL  0xB18
$define _DMA1STBH  0xB1A
$define _DMA1PAD  0xB1C
$define _DMA1CNT  0xB1E
$define _DMA2CON  0xB20
$define _DMA2REQ  0xB22
$define _DMA2STAL  0xB24
$define _DMA2STAH  0xB26
$define _DMA2STBL  0xB28
$define _DMA2STBH  0xB2A
$define _DMA2PAD  0xB2C
$define _DMA2CNT  0xB2E
$define _DMA3CON  0xB30
$define _DMA3REQ  0xB32
$define _DMA3STAL  0xB34
$define _DMA3STAH  0xB36
$define _DMA3STBL  0xB38
$define _DMA3STBH  0xB3A
$define _DMA3PAD  0xB3C
$define _DMA3CNT  0xB3E
$define _DMAPWC  0xBF0
$define _DMARQC  0xBF2
$define _DMAPPS  0xBF4
$define _DMALCA  0xBF6
$define _DSADRL  0xBF8
$define _DSADRH  0xBFA
$define _PTCON  0xC00
$define _PTCON2  0xC02
$define _PTPER  0xC04
$define _SEVTCMP  0xC06
$define _MDC  0xC0A
$define _CHOP  0xC1A
$define _PWMKEY  0xC1E
$define _PWMCON1  0xC20
$define _IOCON1  0xC22
$define _FCLCON1  0xC24
$define _PDC1  0xC26
$define _PHASE1  0xC28
$define _DTR1  0xC2A
$define _ALTDTR1  0xC2C
$define _TRIG1  0xC32
$define _TRGCON1  0xC34
$define _LEBCON1  0xC3A
$define _LEBDLY1  0xC3C
$define _AUXCON1  0xC3E
$define _PWMCON2  0xC40
$define _IOCON2  0xC42
$define _FCLCON2  0xC44
$define _PDC2  0xC46
$define _PHASE2  0xC48
$define _DTR2  0xC4A
$define _ALTDTR2  0xC4C
$define _TRIG2  0xC52
$define _TRGCON2  0xC54
$define _LEBCON2  0xC5A
$define _LEBDLY2  0xC5C
$define _AUXCON2  0xC5E
$define _PWMCON3  0xC60
$define _IOCON3  0xC62
$define _FCLCON3  0xC64
$define _PDC3  0xC66
$define _PHASE3  0xC68
$define _DTR3  0xC6A
$define _ALTDTR3  0xC6C
$define _TRIG3  0xC72
$define _TRGCON3  0xC74
$define _LEBCON3  0xC7A
$define _LEBDLY3  0xC7C
$define _AUXCON3  0xC7E
$define _TRISA  0xE00
$define _PORTA  0xE02
$define _LATA  0xE04
$define _ODCA  0xE06
$define _CNENA  0xE08
$define _CNPUA  0xE0A
$define _CNPDA  0xE0C
$define _ANSELA  0xE0E
$define _TRISB  0xE10
$define _PORTB  0xE12
$define _LATB  0xE14
$define _ODCB  0xE16
$define _CNENB  0xE18
$define _CNPUB  0xE1A
$define _CNPDB  0xE1C
$define _ANSELB  0xE1E
$define _APPS  0xFA4
$define _STROUTL  0xFA6
$define _STROUTH  0xFA8
$define _STROVCNT  0xFAA
$define _JDATAH  0xFF0
$define _JDATAL  0xFF2

' SR Bits
$define SRbits_C SR.0
$define STATUSbits_C SR.0
$define SRbits_Z SR.1
$define STATUSbits_Z SR.1
$define SRbits_OV SR.2
$define STATUSbits_OV SR.2
$define SRbits_N SR.3
$define STATUSbits_N SR.3
$define SRbits_RA SR.4
$define STATUSbits_RA SR.4
$define SRbits_DC SR.8
$define STATUSbits_DC SR.8
$define SRbits_DA SR.9
$define STATUSbits_DA SR.9
$define SRbits_SAB SR.10
$define STATUSbits_SAB SR.10
$define SRbits_OAB SR.11
$define STATUSbits_OAB SR.11
$define SRbits_SB SR.12
$define STATUSbits_SB SR.12
$define SRbits_SA SR.13
$define STATUSbits_SA SR.13
$define SRbits_OB SR.14
$define STATUSbits_OB SR.14
$define SRbits_OA SR.15
$define STATUSbits_OA SR.15
$define SRbits_IPL0 SR.5
$define STATUSbits_IPL0 SR.5
$define SRbits_IPL1 SR.6
$define STATUSbits_IPL1 SR.6
$define SRbits_IPL2 SR.7
$define STATUSbits_IPL2 SR.7

' CORCON Bits
$define CORCONbits_IF CORCON.0
$define CORCONbits_RND CORCON.1
$define CORCONbits_SFA CORCON.2
$define CORCONbits_IPL3 CORCON.3
$define CORCONbits_ACCSAT CORCON.4
$define CORCONbits_SATDW CORCON.5
$define CORCONbits_SATB CORCON.6
$define CORCONbits_SATA CORCON.7
$define CORCONbits_EDT CORCON.11
$define CORCONbits_VAR CORCON.15
$define CORCONbits_DL0 CORCON.8
$define CORCONbits_DL1 CORCON.9
$define CORCONbits_DL2 CORCON.10
$define CORCONbits_US0 CORCON.12
$define CORCONbits_US1 CORCON.13

' T1CON Bits
$define T1CONbits_TCS T1CON.1
$define T1CONbits_TSYNC T1CON.2
$define T1CONbits_TGATE T1CON.6
$define T1CONbits_TSIDL T1CON.13
$define T1CONbits_TON T1CON.15
$define T1CONbits_TCKPS0 T1CON.4
$define T1CONbits_TCKPS1 T1CON.5

' T2CON Bits
$define T2CONbits_TCS T2CON.1
$define T2CONbits_T32 T2CON.3
$define T2CONbits_TGATE T2CON.6
$define T2CONbits_TSIDL T2CON.13
$define T2CONbits_TON T2CON.15
$define T2CONbits_TCKPS0 T2CON.4
$define T2CONbits_TCKPS1 T2CON.5

' T3CON Bits
$define T3CONbits_TCS T3CON.1
$define T3CONbits_TGATE T3CON.6
$define T3CONbits_TSIDL T3CON.13
$define T3CONbits_TON T3CON.15
$define T3CONbits_TCKPS0 T3CON.4
$define T3CONbits_TCKPS1 T3CON.5

' T4CON Bits
$define T4CONbits_TCS T4CON.1
$define T4CONbits_T32 T4CON.3
$define T4CONbits_TGATE T4CON.6
$define T4CONbits_TSIDL T4CON.13
$define T4CONbits_TON T4CON.15
$define T4CONbits_TCKPS0 T4CON.4
$define T4CONbits_TCKPS1 T4CON.5

' T5CON Bits
$define T5CONbits_TCS T5CON.1
$define T5CONbits_TGATE T5CON.6
$define T5CONbits_TSIDL T5CON.13
$define T5CONbits_TON T5CON.15
$define T5CONbits_TCKPS0 T5CON.4
$define T5CONbits_TCKPS1 T5CON.5

' IC1CON1 Bits
$define IC1CON1bits_ICBNE IC1CON1.3
$define IC1CON1bits_ICOV IC1CON1.4
$define IC1CON1bits_ICSIDL IC1CON1.13
$define IC1CON1bits_ICM0 IC1CON1.0
$define IC1CON1bits_ICM1 IC1CON1.1
$define IC1CON1bits_ICM2 IC1CON1.2
$define IC1CON1bits_ICI0 IC1CON1.5
$define IC1CON1bits_ICI1 IC1CON1.6
$define IC1CON1bits_ICTSEL0 IC1CON1.10
$define IC1CON1bits_ICTSEL1 IC1CON1.11
$define IC1CON1bits_ICTSEL2 IC1CON1.12

' IC1CON2 Bits
$define IC1CON2bits_TRIGSTAT IC1CON2.6
$define IC1CON2bits_ICTRIG IC1CON2.7
$define IC1CON2bits_IC32 IC1CON2.8
$define IC1CON2bits_SYNCSEL0 IC1CON2.0
$define IC1CON2bits_SYNCSEL1 IC1CON2.1
$define IC1CON2bits_SYNCSEL2 IC1CON2.2
$define IC1CON2bits_SYNCSEL3 IC1CON2.3
$define IC1CON2bits_SYNCSEL4 IC1CON2.4

' IC2CON1 Bits
$define IC2CON1bits_ICBNE IC2CON1.3
$define IC2CON1bits_ICOV IC2CON1.4
$define IC2CON1bits_ICSIDL IC2CON1.13
$define IC2CON1bits_ICM0 IC2CON1.0
$define IC2CON1bits_ICM1 IC2CON1.1
$define IC2CON1bits_ICM2 IC2CON1.2
$define IC2CON1bits_ICI0 IC2CON1.5
$define IC2CON1bits_ICI1 IC2CON1.6
$define IC2CON1bits_ICTSEL0 IC2CON1.10
$define IC2CON1bits_ICTSEL1 IC2CON1.11
$define IC2CON1bits_ICTSEL2 IC2CON1.12

' IC2CON2 Bits
$define IC2CON2bits_TRIGSTAT IC2CON2.6
$define IC2CON2bits_ICTRIG IC2CON2.7
$define IC2CON2bits_IC32 IC2CON2.8
$define IC2CON2bits_SYNCSEL0 IC2CON2.0
$define IC2CON2bits_SYNCSEL1 IC2CON2.1
$define IC2CON2bits_SYNCSEL2 IC2CON2.2
$define IC2CON2bits_SYNCSEL3 IC2CON2.3
$define IC2CON2bits_SYNCSEL4 IC2CON2.4

' IC3CON1 Bits
$define IC3CON1bits_ICBNE IC3CON1.3
$define IC3CON1bits_ICOV IC3CON1.4
$define IC3CON1bits_ICSIDL IC3CON1.13
$define IC3CON1bits_ICM0 IC3CON1.0
$define IC3CON1bits_ICM1 IC3CON1.1
$define IC3CON1bits_ICM2 IC3CON1.2
$define IC3CON1bits_ICI0 IC3CON1.5
$define IC3CON1bits_ICI1 IC3CON1.6
$define IC3CON1bits_ICTSEL0 IC3CON1.10
$define IC3CON1bits_ICTSEL1 IC3CON1.11
$define IC3CON1bits_ICTSEL2 IC3CON1.12

' IC3CON2 Bits
$define IC3CON2bits_TRIGSTAT IC3CON2.6
$define IC3CON2bits_ICTRIG IC3CON2.7
$define IC3CON2bits_IC32 IC3CON2.8
$define IC3CON2bits_SYNCSEL0 IC3CON2.0
$define IC3CON2bits_SYNCSEL1 IC3CON2.1
$define IC3CON2bits_SYNCSEL2 IC3CON2.2
$define IC3CON2bits_SYNCSEL3 IC3CON2.3
$define IC3CON2bits_SYNCSEL4 IC3CON2.4

' IC4CON1 Bits
$define IC4CON1bits_ICBNE IC4CON1.3
$define IC4CON1bits_ICOV IC4CON1.4
$define IC4CON1bits_ICSIDL IC4CON1.13
$define IC4CON1bits_ICM0 IC4CON1.0
$define IC4CON1bits_ICM1 IC4CON1.1
$define IC4CON1bits_ICM2 IC4CON1.2
$define IC4CON1bits_ICI0 IC4CON1.5
$define IC4CON1bits_ICI1 IC4CON1.6
$define IC4CON1bits_ICTSEL0 IC4CON1.10
$define IC4CON1bits_ICTSEL1 IC4CON1.11
$define IC4CON1bits_ICTSEL2 IC4CON1.12

' IC4CON2 Bits
$define IC4CON2bits_TRIGSTAT IC4CON2.6
$define IC4CON2bits_ICTRIG IC4CON2.7
$define IC4CON2bits_IC32 IC4CON2.8
$define IC4CON2bits_SYNCSEL0 IC4CON2.0
$define IC4CON2bits_SYNCSEL1 IC4CON2.1
$define IC4CON2bits_SYNCSEL2 IC4CON2.2
$define IC4CON2bits_SYNCSEL3 IC4CON2.3
$define IC4CON2bits_SYNCSEL4 IC4CON2.4

' QEI1CON Bits
$define QEI1CONbits_GATEN QEI1CON.2
$define QEI1CONbits_CNTPOL QEI1CON.3
$define QEI1CONbits_QEISIDL QEI1CON.13
$define QEI1CONbits_QEIEN QEI1CON.15

' QEI1IOC Bits
$define QEI1IOCbits_QEA QEI1IOC.0
$define QEI1IOCbits_QEB QEI1IOC.1
$define QEI1IOCbits_INDEX QEI1IOC.2
$define QEI1IOCbits_HOME QEI1IOC.3
$define QEI1IOCbits_QEAPOL QEI1IOC.4
$define QEI1IOCbits_QEBPOL QEI1IOC.5
$define QEI1IOCbits_IDXPOL QEI1IOC.6
$define QEI1IOCbits_HOMPOL QEI1IOC.7
$define QEI1IOCbits_SWPAB QEI1IOC.8
$define QEI1IOCbits_FLTREN QEI1IOC.14
$define QEI1IOCbits_QCAPEN QEI1IOC.15

' QEI1STAT Bits
$define QEI1STATbits_IDXIEN QEI1STAT.0
$define QEI1STATbits_IDXIRQ QEI1STAT.1
$define QEI1STATbits_HOMIEN QEI1STAT.2
$define QEI1STATbits_HOMIRQ QEI1STAT.3
$define QEI1STATbits_VELOVIEN QEI1STAT.4
$define QEI1STATbits_VELOVIRQ QEI1STAT.5
$define QEI1STATbits_PCIIEN QEI1STAT.6
$define QEI1STATbits_PCIIRQ QEI1STAT.7
$define QEI1STATbits_POSOVIEN QEI1STAT.8
$define QEI1STATbits_POSOVIRQ QEI1STAT.9
$define QEI1STATbits_PCLEQIEN QEI1STAT.10
$define QEI1STATbits_PCLEQIRQ QEI1STAT.11
$define QEI1STATbits_PCHEQIEN QEI1STAT.12
$define QEI1STATbits_PCHEQIRQ QEI1STAT.13

' I2C1CON Bits
$define I2C1CONbits_SEN I2C1CON.0
$define I2C1CONbits_RSEN I2C1CON.1
$define I2C1CONbits_PEN I2C1CON.2
$define I2C1CONbits_RCEN I2C1CON.3
$define I2C1CONbits_ACKEN I2C1CON.4
$define I2C1CONbits_ACKDT I2C1CON.5
$define I2C1CONbits_STREN I2C1CON.6
$define I2C1CONbits_GCEN I2C1CON.7
$define I2C1CONbits_SMEN I2C1CON.8
$define I2C1CONbits_DISSLW I2C1CON.9
$define I2C1CONbits_A10M I2C1CON.10
$define I2C1CONbits_IPMIEN I2C1CON.11
$define I2C1CONbits_SCLREL I2C1CON.12
$define I2C1CONbits_I2CSIDL I2C1CON.13
$define I2C1CONbits_I2CEN I2C1CON.15

' I2C1STAT Bits
$define I2C1STATbits_TBF I2C1STAT.0
$define I2C1STATbits_RBF I2C1STAT.1
$define I2C1STATbits_R_W I2C1STAT.2
$define I2C1STATbits_S I2C1STAT.3
$define I2C1STATbits_P I2C1STAT.4
$define I2C1STATbits_D_A I2C1STAT.5
$define I2C1STATbits_I2COV I2C1STAT.6
$define I2C1STATbits_IWCOL I2C1STAT.7
$define I2C1STATbits_ADD10 I2C1STAT.8
$define I2C1STATbits_GCSTAT I2C1STAT.9
$define I2C1STATbits_BCL_I2C1STAT I2C1STAT.10
$define I2C1STATbits_TRSTAT I2C1STAT.14
$define I2C1STATbits_ACKSTAT I2C1STAT.15

' I2C2CON Bits
$define I2C2CONbits_SEN I2C2CON.0
$define I2C2CONbits_RSEN I2C2CON.1
$define I2C2CONbits_PEN I2C2CON.2
$define I2C2CONbits_RCEN I2C2CON.3
$define I2C2CONbits_ACKEN I2C2CON.4
$define I2C2CONbits_ACKDT I2C2CON.5
$define I2C2CONbits_STREN I2C2CON.6
$define I2C2CONbits_GCEN I2C2CON.7
$define I2C2CONbits_SMEN I2C2CON.8
$define I2C2CONbits_DISSLW I2C2CON.9
$define I2C2CONbits_A10M I2C2CON.10
$define I2C2CONbits_IPMIEN I2C2CON.11
$define I2C2CONbits_SCLREL I2C2CON.12
$define I2C2CONbits_I2CSIDL I2C2CON.13
$define I2C2CONbits_I2CEN I2C2CON.15

' I2C2STAT Bits
$define I2C2STATbits_TBF I2C2STAT.0
$define I2C2STATbits_RBF I2C2STAT.1
$define I2C2STATbits_R_W I2C2STAT.2
$define I2C2STATbits_S I2C2STAT.3
$define I2C2STATbits_P I2C2STAT.4
$define I2C2STATbits_D_A I2C2STAT.5
$define I2C2STATbits_I2COV I2C2STAT.6
$define I2C2STATbits_IWCOL I2C2STAT.7
$define I2C2STATbits_ADD10 I2C2STAT.8
$define I2C2STATbits_GCSTAT I2C2STAT.9
$define I2C2STATbits_BCL_I2C2STAT I2C2STAT.10
$define I2C2STATbits_TRSTAT I2C2STAT.14
$define I2C2STATbits_ACKSTAT I2C2STAT.15

' U1MODE Bits
$define U1MODEbits_STSEL U1MODE.0
$define U1MODEbits_BRGH U1MODE.3
$define U1MODEbits_URXINV U1MODE.4
$define U1MODEbits_ABAUD U1MODE.5
$define U1MODEbits_LPBACK U1MODE.6
$define U1MODEbits_WAKE U1MODE.7
$define U1MODEbits_RTSMD U1MODE.11
$define U1MODEbits_IREN U1MODE.12
$define U1MODEbits_USIDL U1MODE.13
$define U1MODEbits_UARTEN U1MODE.15
$define U1MODEbits_PDSEL0 U1MODE.1
$define U1MODEbits_PDSEL1 U1MODE.2
$define U1MODEbits_RXINV U1MODE.4
$define U1MODEbits_UEN0 U1MODE.8
$define U1MODEbits_UEN1 U1MODE.9

' U1STA Bits
$define U1STAbits_URXDA U1STA.0
$define U1STAbits_OERR U1STA.1
$define U1STAbits_FERR U1STA.2
$define U1STAbits_PERR U1STA.3
$define U1STAbits_RIDLE U1STA.4
$define U1STAbits_ADDEN U1STA.5
$define U1STAbits_TRMT U1STA.8
$define U1STAbits_UTXBF U1STA.9
$define U1STAbits_UTXEN U1STA.10
$define U1STAbits_UTXBRK U1STA.11
$define U1STAbits_UTXISEL0 U1STA.13
$define U1STAbits_UTXINV U1STA.14
$define U1STAbits_UTXISEL1 U1STA.15
$define U1STAbits_URXISEL0 U1STA.6
$define U1STAbits_URXISEL1 U1STA.7

' U2MODE Bits
$define U2MODEbits_STSEL U2MODE.0
$define U2MODEbits_BRGH U2MODE.3
$define U2MODEbits_URXINV U2MODE.4
$define U2MODEbits_ABAUD U2MODE.5
$define U2MODEbits_LPBACK U2MODE.6
$define U2MODEbits_WAKE U2MODE.7
$define U2MODEbits_RTSMD U2MODE.11
$define U2MODEbits_IREN U2MODE.12
$define U2MODEbits_USIDL U2MODE.13
$define U2MODEbits_UARTEN U2MODE.15
$define U2MODEbits_PDSEL0 U2MODE.1
$define U2MODEbits_PDSEL1 U2MODE.2
$define U2MODEbits_RXINV U2MODE.4
$define U2MODEbits_UEN0 U2MODE.8
$define U2MODEbits_UEN1 U2MODE.9

' U2STA Bits
$define U2STAbits_URXDA U2STA.0
$define U2STAbits_OERR U2STA.1
$define U2STAbits_FERR U2STA.2
$define U2STAbits_PERR U2STA.3
$define U2STAbits_RIDLE U2STA.4
$define U2STAbits_ADDEN U2STA.5
$define U2STAbits_TRMT U2STA.8
$define U2STAbits_UTXBF U2STA.9
$define U2STAbits_UTXEN U2STA.10
$define U2STAbits_UTXBRK U2STA.11
$define U2STAbits_UTXISEL0 U2STA.13
$define U2STAbits_UTXINV U2STA.14
$define U2STAbits_UTXISEL1 U2STA.15
$define U2STAbits_URXISEL0 U2STA.6
$define U2STAbits_URXISEL1 U2STA.7

' SPI1STAT Bits
$define SPI1STATbits_SPIRBF SPI1STAT.0
$define SPI1STATbits_SPITBF SPI1STAT.1
$define SPI1STATbits_SRXMPT SPI1STAT.5
$define SPI1STATbits_SPIROV SPI1STAT.6
$define SPI1STATbits_SRMPT SPI1STAT.7
$define SPI1STATbits_SPISIDL SPI1STAT.13
$define SPI1STATbits_SPIEN SPI1STAT.15
$define SPI1STATbits_SISEL0 SPI1STAT.2
$define SPI1STATbits_SISEL1 SPI1STAT.3
$define SPI1STATbits_SISEL2 SPI1STAT.4
$define SPI1STATbits_SPIBEC0 SPI1STAT.8
$define SPI1STATbits_SPIBEC1 SPI1STAT.9
$define SPI1STATbits_SPIBEC2 SPI1STAT.10

' SPI1CON1 Bits
$define SPI1CON1bits_MSTEN SPI1CON1.5
$define SPI1CON1bits_CKP SPI1CON1.6
$define SPI1CON1bits_SSEN SPI1CON1.7
$define SPI1CON1bits_CKE SPI1CON1.8
$define SPI1CON1bits_SMP SPI1CON1.9
$define SPI1CON1bits_MODE16 SPI1CON1.10
$define SPI1CON1bits_DISSDO SPI1CON1.11
$define SPI1CON1bits_DISSCK SPI1CON1.12
$define SPI1CON1bits_PPRE0 SPI1CON1.0
$define SPI1CON1bits_PPRE1 SPI1CON1.1
$define SPI1CON1bits_SPRE0 SPI1CON1.2
$define SPI1CON1bits_SPRE1 SPI1CON1.3
$define SPI1CON1bits_SPRE2 SPI1CON1.4

' SPI1CON2 Bits
$define SPI1CON2bits_SPIBEN SPI1CON2.0
$define SPI1CON2bits_FRMDLY SPI1CON2.1
$define SPI1CON2bits_FRMPOL SPI1CON2.13
$define SPI1CON2bits_SPIFSD SPI1CON2.14
$define SPI1CON2bits_FRMEN SPI1CON2.15

' SPI2STAT Bits
$define SPI2STATbits_SPIRBF SPI2STAT.0
$define SPI2STATbits_SPITBF SPI2STAT.1
$define SPI2STATbits_SRXMPT SPI2STAT.5
$define SPI2STATbits_SPIROV SPI2STAT.6
$define SPI2STATbits_SRMPT SPI2STAT.7
$define SPI2STATbits_SPISIDL SPI2STAT.13
$define SPI2STATbits_SPIEN SPI2STAT.15
$define SPI2STATbits_SISEL0 SPI2STAT.2
$define SPI2STATbits_SISEL1 SPI2STAT.3
$define SPI2STATbits_SISEL2 SPI2STAT.4
$define SPI2STATbits_SPIBEC0 SPI2STAT.8
$define SPI2STATbits_SPIBEC1 SPI2STAT.9
$define SPI2STATbits_SPIBEC2 SPI2STAT.10

' SPI2CON1 Bits
$define SPI2CON1bits_MSTEN SPI2CON1.5
$define SPI2CON1bits_CKP SPI2CON1.6
$define SPI2CON1bits_SSEN SPI2CON1.7
$define SPI2CON1bits_CKE SPI2CON1.8
$define SPI2CON1bits_SMP SPI2CON1.9
$define SPI2CON1bits_MODE16 SPI2CON1.10
$define SPI2CON1bits_DISSDO SPI2CON1.11
$define SPI2CON1bits_DISSCK SPI2CON1.12
$define SPI2CON1bits_PPRE0 SPI2CON1.0
$define SPI2CON1bits_PPRE1 SPI2CON1.1
$define SPI2CON1bits_SPRE0 SPI2CON1.2
$define SPI2CON1bits_SPRE1 SPI2CON1.3
$define SPI2CON1bits_SPRE2 SPI2CON1.4

' SPI2CON2 Bits
$define SPI2CON2bits_SPIBEN SPI2CON2.0
$define SPI2CON2bits_FRMDLY SPI2CON2.1
$define SPI2CON2bits_FRMPOL SPI2CON2.13
$define SPI2CON2bits_SPIFSD SPI2CON2.14
$define SPI2CON2bits_FRMEN SPI2CON2.15

' AD1CON1 Bits
$define AD1CON1bits_DONE AD1CON1.0
$define AD1CON1bits_SAMP AD1CON1.1
$define AD1CON1bits_ASAM AD1CON1.2
$define AD1CON1bits_SIMSAM AD1CON1.3
$define AD1CON1bits_SSRCG AD1CON1.4
$define AD1CON1bits_AD12B AD1CON1.10
$define AD1CON1bits_ADDMABM AD1CON1.12
$define AD1CON1bits_ADSIDL AD1CON1.13
$define AD1CON1bits_ADON AD1CON1.15
$define AD1CON1bits_SSRC0 AD1CON1.5
$define AD1CON1bits_SSRC1 AD1CON1.6
$define AD1CON1bits_SSRC2 AD1CON1.7
$define AD1CON1bits_FORM0 AD1CON1.8
$define AD1CON1bits_FORM1 AD1CON1.9

' AD1CON2 Bits
$define AD1CON2bits_ALTS AD1CON2.0
$define AD1CON2bits_BUFM AD1CON2.1
$define AD1CON2bits_BUFS AD1CON2.7
$define AD1CON2bits_CSCNA AD1CON2.10
$define AD1CON2bits_SMPI0 AD1CON2.2
$define AD1CON2bits_SMPI1 AD1CON2.3
$define AD1CON2bits_SMPI2 AD1CON2.4
$define AD1CON2bits_SMPI3 AD1CON2.5
$define AD1CON2bits_SMPI4 AD1CON2.6
$define AD1CON2bits_CHPS0 AD1CON2.8
$define AD1CON2bits_CHPS1 AD1CON2.9
$define AD1CON2bits_VCFG0 AD1CON2.13
$define AD1CON2bits_VCFG1 AD1CON2.14
$define AD1CON2bits_VCFG2 AD1CON2.15

' AD1CON3 Bits
$define AD1CON3bits_ADRC AD1CON3.15
$define AD1CON3bits_ADCS0 AD1CON3.0
$define AD1CON3bits_ADCS1 AD1CON3.1
$define AD1CON3bits_ADCS2 AD1CON3.2
$define AD1CON3bits_ADCS3 AD1CON3.3
$define AD1CON3bits_ADCS4 AD1CON3.4
$define AD1CON3bits_ADCS5 AD1CON3.5
$define AD1CON3bits_ADCS6 AD1CON3.6
$define AD1CON3bits_ADCS7 AD1CON3.7
$define AD1CON3bits_SAMC0 AD1CON3.8
$define AD1CON3bits_SAMC1 AD1CON3.9
$define AD1CON3bits_SAMC2 AD1CON3.10
$define AD1CON3bits_SAMC3 AD1CON3.11
$define AD1CON3bits_SAMC4 AD1CON3.12

' AD1CHS123 Bits
$define AD1CHS123bits_CH123SA AD1CHS123.0
$define AD1CHS123bits_CH123SB AD1CHS123.8
$define AD1CHS123bits_CH123NA0 AD1CHS123.1
$define AD1CHS123bits_CH123NA1 AD1CHS123.2
$define AD1CHS123bits_CH123NB0 AD1CHS123.9
$define AD1CHS123bits_CH123NB1 AD1CHS123.10

' AD1CHS0 Bits
$define AD1CHS0bits_CH0NA AD1CHS0.7
$define AD1CHS0bits_CH0NB AD1CHS0.15
$define AD1CHS0bits_CH0SA0 AD1CHS0.0
$define AD1CHS0bits_CH0SA1 AD1CHS0.1
$define AD1CHS0bits_CH0SA2 AD1CHS0.2
$define AD1CHS0bits_CH0SA3 AD1CHS0.3
$define AD1CHS0bits_CH0SA4 AD1CHS0.4
$define AD1CHS0bits_CH0SB0 AD1CHS0.8
$define AD1CHS0bits_CH0SB1 AD1CHS0.9
$define AD1CHS0bits_CH0SB2 AD1CHS0.10
$define AD1CHS0bits_CH0SB3 AD1CHS0.11
$define AD1CHS0bits_CH0SB4 AD1CHS0.12

' AD1CSSH Bits
$define AD1CSSHbits_CSS24 AD1CSSH.8
$define AD1CSSHbits_CSS25 AD1CSSH.9
$define AD1CSSHbits_CSS26 AD1CSSH.10
$define AD1CSSHbits_CSS30 AD1CSSH.14
$define AD1CSSHbits_CSS31 AD1CSSH.15

' AD1CSSL Bits
$define AD1CSSLbits_CSS0 AD1CSSL.0
$define AD1CSSLbits_CSS1 AD1CSSL.1
$define AD1CSSLbits_CSS2 AD1CSSL.2
$define AD1CSSLbits_CSS3 AD1CSSL.3
$define AD1CSSLbits_CSS4 AD1CSSL.4
$define AD1CSSLbits_CSS5 AD1CSSL.5
$define AD1CSSLbits_CSS6 AD1CSSL.6
$define AD1CSSLbits_CSS7 AD1CSSL.7
$define AD1CSSLbits_CSS8 AD1CSSL.8
$define AD1CSSLbits_CSS9 AD1CSSL.9
$define AD1CSSLbits_CSS10 AD1CSSL.10
$define AD1CSSLbits_CSS11 AD1CSSL.11
$define AD1CSSLbits_CSS12 AD1CSSL.12
$define AD1CSSLbits_CSS13 AD1CSSL.13
$define AD1CSSLbits_CSS14 AD1CSSL.14
$define AD1CSSLbits_CSS15 AD1CSSL.15

' AD1CON4 Bits
$define AD1CON4bits_ADDMAEN AD1CON4.8
$define AD1CON4bits_DMABL0 AD1CON4.0
$define AD1CON4bits_DMABL1 AD1CON4.1
$define AD1CON4bits_DMABL2 AD1CON4.2

' CTMUCON1 Bits
$define CTMUCON1bits_CTTRIG CTMUCON1.8
$define CTMUCON1bits_IDISSEN CTMUCON1.9
$define CTMUCON1bits_EDGSEQEN CTMUCON1.10
$define CTMUCON1bits_EDGEN CTMUCON1.11
$define CTMUCON1bits_TGEN CTMUCON1.12
$define CTMUCON1bits_CTMUSIDL CTMUCON1.13
$define CTMUCON1bits_CTMUEN CTMUCON1.15

' CTMUCON2 Bits
$define CTMUCON2bits_EDG2POL CTMUCON2.6
$define CTMUCON2bits_EDG2MOD CTMUCON2.7
$define CTMUCON2bits_EDG1STAT CTMUCON2.8
$define CTMUCON2bits_EDG2STAT CTMUCON2.9
$define CTMUCON2bits_EDG1POL CTMUCON2.14
$define CTMUCON2bits_EDG1MOD CTMUCON2.15
$define CTMUCON2bits_EDG2SEL0 CTMUCON2.2
$define CTMUCON2bits_EDG2SEL1 CTMUCON2.3
$define CTMUCON2bits_EDG2SEL2 CTMUCON2.4
$define CTMUCON2bits_EDG2SEL3 CTMUCON2.5
$define CTMUCON2bits_EDG1SEL0 CTMUCON2.10
$define CTMUCON2bits_EDG1SEL1 CTMUCON2.11
$define CTMUCON2bits_EDG1SEL2 CTMUCON2.12
$define CTMUCON2bits_EDG1SEL3 CTMUCON2.13

' CTMUICON Bits
$define CTMUICONbits_IRNG0 CTMUICON.8
$define CTMUICONbits_IRNG1 CTMUICON.9
$define CTMUICONbits_ITRIM0 CTMUICON.10
$define CTMUICONbits_ITRIM1 CTMUICON.11
$define CTMUICONbits_ITRIM2 CTMUICON.12
$define CTMUICONbits_ITRIM3 CTMUICON.13
$define CTMUICONbits_ITRIM4 CTMUICON.14
$define CTMUICONbits_ITRIM5 CTMUICON.15

' CRCCON1 Bits
$define CRCCON1bits_LENDIAN CRCCON1.3
$define CRCCON1bits_CRCGO CRCCON1.4
$define CRCCON1bits_CRCISEL CRCCON1.5
$define CRCCON1bits_CRCMPT CRCCON1.6
$define CRCCON1bits_CRCFUL CRCCON1.7
$define CRCCON1bits_CSIDL CRCCON1.13
$define CRCCON1bits_CRCEN CRCCON1.15
$define CRCCON1bits_VWORD0 CRCCON1.8
$define CRCCON1bits_VWORD1 CRCCON1.9
$define CRCCON1bits_VWORD2 CRCCON1.10
$define CRCCON1bits_VWORD3 CRCCON1.11
$define CRCCON1bits_VWORD4 CRCCON1.12

' CRCCON2 Bits
$define CRCCON2bits_PLEN0 CRCCON2.0
$define CRCCON2bits_PLEN1 CRCCON2.1
$define CRCCON2bits_PLEN2 CRCCON2.2
$define CRCCON2bits_PLEN3 CRCCON2.3
$define CRCCON2bits_PLEN4 CRCCON2.4
$define CRCCON2bits_DWIDTH0 CRCCON2.8
$define CRCCON2bits_DWIDTH1 CRCCON2.9
$define CRCCON2bits_DWIDTH2 CRCCON2.10
$define CRCCON2bits_DWIDTH3 CRCCON2.11
$define CRCCON2bits_DWIDTH4 CRCCON2.12

' CRCXORL Bits
$define CRCXORLbits_X1 CRCXORL.1
$define CRCXORLbits_X2 CRCXORL.2
$define CRCXORLbits_X3 CRCXORL.3
$define CRCXORLbits_X4 CRCXORL.4
$define CRCXORLbits_X5 CRCXORL.5
$define CRCXORLbits_X6 CRCXORL.6
$define CRCXORLbits_X7 CRCXORL.7
$define CRCXORLbits_X8 CRCXORL.8
$define CRCXORLbits_X9 CRCXORL.9
$define CRCXORLbits_X10 CRCXORL.10
$define CRCXORLbits_X11 CRCXORL.11
$define CRCXORLbits_X12 CRCXORL.12
$define CRCXORLbits_X13 CRCXORL.13
$define CRCXORLbits_X14 CRCXORL.14
$define CRCXORLbits_X15 CRCXORL.15

' CRCXORH Bits
$define CRCXORHbits_X16 CRCXORH.0
$define CRCXORHbits_X17 CRCXORH.1
$define CRCXORHbits_X18 CRCXORH.2
$define CRCXORHbits_X19 CRCXORH.3
$define CRCXORHbits_X20 CRCXORH.4
$define CRCXORHbits_X21 CRCXORH.5
$define CRCXORHbits_X22 CRCXORH.6
$define CRCXORHbits_X23 CRCXORH.7
$define CRCXORHbits_X24 CRCXORH.8
$define CRCXORHbits_X25 CRCXORH.9
$define CRCXORHbits_X26 CRCXORH.10
$define CRCXORHbits_X27 CRCXORH.11
$define CRCXORHbits_X28 CRCXORH.12
$define CRCXORHbits_X29 CRCXORH.13
$define CRCXORHbits_X30 CRCXORH.14
$define CRCXORHbits_X31 CRCXORH.15

' RPOR0 Bits
$define RPOR0bits_RP20R RPOR0.Byte0
$define RPOR0bits_RP20R0 RPOR0.0
$define RPOR0bits_RP20R1 RPOR0.1
$define RPOR0bits_RP20R2 RPOR0.2
$define RPOR0bits_RP20R3 RPOR0.3
$define RPOR0bits_RP20R4 RPOR0.4
$define RPOR0bits_RP20R5 RPOR0.5
$define RPOR0bits_RP35R RPOR0.Byte1
$define RPOR0bits_RP35R0 RPOR0.8
$define RPOR0bits_RP35R1 RPOR0.9
$define RPOR0bits_RP35R2 RPOR0.10
$define RPOR0bits_RP35R3 RPOR0.11
$define RPOR0bits_RP35R4 RPOR0.12
$define RPOR0bits_RP35R5 RPOR0.13

' RPOR1 Bits
$define RPOR1bits_RP36R RPOR1.Byte0
$define RPOR1bits_RP36R0 RPOR1.0
$define RPOR1bits_RP36R1 RPOR1.1
$define RPOR1bits_RP36R2 RPOR1.2
$define RPOR1bits_RP36R3 RPOR1.3
$define RPOR1bits_RP36R4 RPOR1.4
$define RPOR1bits_RP36R5 RPOR1.5
$define RPOR1bits_RP37R RPOR1.Byte1
$define RPOR1bits_RP37R0 RPOR1.8
$define RPOR1bits_RP37R1 RPOR1.9
$define RPOR1bits_RP37R2 RPOR1.10
$define RPOR1bits_RP37R3 RPOR1.11
$define RPOR1bits_RP37R4 RPOR1.12
$define RPOR1bits_RP37R5 RPOR1.13

' RPOR2 Bits
$define RPOR2bits_RP38R RPOR2.Byte0
$define RPOR2bits_RP38R0 RPOR2.0
$define RPOR2bits_RP38R1 RPOR2.1
$define RPOR2bits_RP38R2 RPOR2.2
$define RPOR2bits_RP38R3 RPOR2.3
$define RPOR2bits_RP38R4 RPOR2.4
$define RPOR2bits_RP38R5 RPOR2.5
$define RPOR2bits_RP39R RPOR2.Byte1
$define RPOR2bits_RP39R0 RPOR2.8
$define RPOR2bits_RP39R1 RPOR2.9
$define RPOR2bits_RP39R2 RPOR2.10
$define RPOR2bits_RP39R3 RPOR2.11
$define RPOR2bits_RP39R4 RPOR2.12
$define RPOR2bits_RP39R5 RPOR2.13

' RPOR3 Bits
$define RPOR3bits_RP40R RPOR3.Byte0
$define RPOR3bits_RP40R0 RPOR3.0
$define RPOR3bits_RP40R1 RPOR3.1
$define RPOR3bits_RP40R2 RPOR3.2
$define RPOR3bits_RP40R3 RPOR3.3
$define RPOR3bits_RP40R4 RPOR3.4
$define RPOR3bits_RP40R5 RPOR3.5
$define RPOR3bits_RP41R RPOR3.Byte1
$define RPOR3bits_RP41R0 RPOR3.8
$define RPOR3bits_RP41R1 RPOR3.9
$define RPOR3bits_RP41R2 RPOR3.10
$define RPOR3bits_RP41R3 RPOR3.11
$define RPOR3bits_RP41R4 RPOR3.12
$define RPOR3bits_RP41R5 RPOR3.13

' RPOR4 Bits
$define RPOR4bits_RP42R RPOR4.Byte0
$define RPOR4bits_RP42R0 RPOR4.0
$define RPOR4bits_RP42R1 RPOR4.1
$define RPOR4bits_RP42R2 RPOR4.2
$define RPOR4bits_RP42R3 RPOR4.3
$define RPOR4bits_RP42R4 RPOR4.4
$define RPOR4bits_RP42R5 RPOR4.5
$define RPOR4bits_RP43R RPOR4.Byte1
$define RPOR4bits_RP43R0 RPOR4.8
$define RPOR4bits_RP43R1 RPOR4.9
$define RPOR4bits_RP43R2 RPOR4.10
$define RPOR4bits_RP43R3 RPOR4.11
$define RPOR4bits_RP43R4 RPOR4.12
$define RPOR4bits_RP43R5 RPOR4.13

' RPINR0 Bits
$define RPINR0bits_INT1R RPINR0.Byte1
$define RPINR0bits_INT1R0 RPINR0.8
$define RPINR0bits_INT1R1 RPINR0.9
$define RPINR0bits_INT1R2 RPINR0.10
$define RPINR0bits_INT1R3 RPINR0.11
$define RPINR0bits_INT1R4 RPINR0.12
$define RPINR0bits_INT1R5 RPINR0.13
$define RPINR0bits_INT1R6 RPINR0.14

' RPINR1 Bits
$define RPINR1bits_INT2R RPINR1.Byte0
$define RPINR1bits_INT2R0 RPINR1.0
$define RPINR1bits_INT2R1 RPINR1.1
$define RPINR1bits_INT2R2 RPINR1.2
$define RPINR1bits_INT2R3 RPINR1.3
$define RPINR1bits_INT2R4 RPINR1.4
$define RPINR1bits_INT2R5 RPINR1.5
$define RPINR1bits_INT2R6 RPINR1.6

' RPINR3 Bits
$define RPINR3bits_T2CKR RPINR3.Byte0
$define RPINR3bits_T2CKR0 RPINR3.0
$define RPINR3bits_T2CKR1 RPINR3.1
$define RPINR3bits_T2CKR2 RPINR3.2
$define RPINR3bits_T2CKR3 RPINR3.3
$define RPINR3bits_T2CKR4 RPINR3.4
$define RPINR3bits_T2CKR5 RPINR3.5
$define RPINR3bits_T2CKR6 RPINR3.6

' RPINR7 Bits
$define RPINR7bits_IC1R RPINR7.Byte0
$define RPINR7bits_IC1R0 RPINR7.0
$define RPINR7bits_IC1R1 RPINR7.1
$define RPINR7bits_IC1R2 RPINR7.2
$define RPINR7bits_IC1R3 RPINR7.3
$define RPINR7bits_IC1R4 RPINR7.4
$define RPINR7bits_IC1R5 RPINR7.5
$define RPINR7bits_IC1R6 RPINR7.6
$define RPINR7bits_IC2R RPINR7.Byte1
$define RPINR7bits_IC2R0 RPINR7.8
$define RPINR7bits_IC2R1 RPINR7.9
$define RPINR7bits_IC2R2 RPINR7.10
$define RPINR7bits_IC2R3 RPINR7.11
$define RPINR7bits_IC2R4 RPINR7.12
$define RPINR7bits_IC2R5 RPINR7.13
$define RPINR7bits_IC2R6 RPINR7.14

' RPINR8 Bits
$define RPINR8bits_IC3R RPINR8.Byte0
$define RPINR8bits_IC3R0 RPINR8.0
$define RPINR8bits_IC3R1 RPINR8.1
$define RPINR8bits_IC3R2 RPINR8.2
$define RPINR8bits_IC3R3 RPINR8.3
$define RPINR8bits_IC3R4 RPINR8.4
$define RPINR8bits_IC3R5 RPINR8.5
$define RPINR8bits_IC3R6 RPINR8.6
$define RPINR8bits_IC4R RPINR8.Byte1
$define RPINR8bits_IC4R0 RPINR8.8
$define RPINR8bits_IC4R1 RPINR8.9
$define RPINR8bits_IC4R2 RPINR8.10
$define RPINR8bits_IC4R3 RPINR8.11
$define RPINR8bits_IC4R4 RPINR8.12
$define RPINR8bits_IC4R5 RPINR8.13
$define RPINR8bits_IC4R6 RPINR8.14

' RPINR11 Bits
$define RPINR11bits_OCFAR RPINR11.Byte0
$define RPINR11bits_OCFAR0 RPINR11.0
$define RPINR11bits_OCFAR1 RPINR11.1
$define RPINR11bits_OCFAR2 RPINR11.2
$define RPINR11bits_OCFAR3 RPINR11.3
$define RPINR11bits_OCFAR4 RPINR11.4
$define RPINR11bits_OCFAR5 RPINR11.5
$define RPINR11bits_OCFAR6 RPINR11.6

' RPINR12 Bits
$define RPINR12bits_FLT1R RPINR12.Byte0
$define RPINR12bits_FLT1R0 RPINR12.0
$define RPINR12bits_FLT1R1 RPINR12.1
$define RPINR12bits_FLT1R2 RPINR12.2
$define RPINR12bits_FLT1R3 RPINR12.3
$define RPINR12bits_FLT1R4 RPINR12.4
$define RPINR12bits_FLT1R5 RPINR12.5
$define RPINR12bits_FLT1R6 RPINR12.6
$define RPINR12bits_FLT2R RPINR12.Byte1
$define RPINR12bits_FLT2R0 RPINR12.8
$define RPINR12bits_FLT2R1 RPINR12.9
$define RPINR12bits_FLT2R2 RPINR12.10
$define RPINR12bits_FLT2R3 RPINR12.11
$define RPINR12bits_FLT2R4 RPINR12.12
$define RPINR12bits_FLT2R5 RPINR12.13
$define RPINR12bits_FLT2R6 RPINR12.14

' RPINR14 Bits
$define RPINR14bits_QEA1R RPINR14.Byte0
$define RPINR14bits_QEA1R0 RPINR14.0
$define RPINR14bits_QEA1R1 RPINR14.1
$define RPINR14bits_QEA1R2 RPINR14.2
$define RPINR14bits_QEA1R3 RPINR14.3
$define RPINR14bits_QEA1R4 RPINR14.4
$define RPINR14bits_QEA1R5 RPINR14.5
$define RPINR14bits_QEA1R6 RPINR14.6
$define RPINR14bits_QEB1R RPINR14.Byte1
$define RPINR14bits_QEB1R0 RPINR14.8
$define RPINR14bits_QEB1R1 RPINR14.9
$define RPINR14bits_QEB1R2 RPINR14.10
$define RPINR14bits_QEB1R3 RPINR14.11
$define RPINR14bits_QEB1R4 RPINR14.12
$define RPINR14bits_QEB1R5 RPINR14.13
$define RPINR14bits_QEB1R6 RPINR14.14

' RPINR15 Bits
$define RPINR15bits_INDX1R RPINR15.Byte0
$define RPINR15bits_INDX1R0 RPINR15.0
$define RPINR15bits_INDX1R1 RPINR15.1
$define RPINR15bits_INDX1R2 RPINR15.2
$define RPINR15bits_INDX1R3 RPINR15.3
$define RPINR15bits_INDX1R4 RPINR15.4
$define RPINR15bits_INDX1R5 RPINR15.5
$define RPINR15bits_INDX1R6 RPINR15.6
$define RPINR15bits_HOME1R RPINR15.Byte1
$define RPINR15bits_HOME1R0 RPINR15.8
$define RPINR15bits_HOME1R1 RPINR15.9
$define RPINR15bits_HOME1R2 RPINR15.10
$define RPINR15bits_HOME1R3 RPINR15.11
$define RPINR15bits_HOME1R4 RPINR15.12
$define RPINR15bits_HOME1R5 RPINR15.13
$define RPINR15bits_HOME1R6 RPINR15.14

' RPINR18 Bits
$define RPINR18bits_U1RXR RPINR18.Byte0
$define RPINR18bits_U1RXR0 RPINR18.0
$define RPINR18bits_U1RXR1 RPINR18.1
$define RPINR18bits_U1RXR2 RPINR18.2
$define RPINR18bits_U1RXR3 RPINR18.3
$define RPINR18bits_U1RXR4 RPINR18.4
$define RPINR18bits_U1RXR5 RPINR18.5
$define RPINR18bits_U1RXR6 RPINR18.6

' RPINR19 Bits
$define RPINR19bits_U2RXR RPINR19.Byte0
$define RPINR19bits_U2RXR0 RPINR19.0
$define RPINR19bits_U2RXR1 RPINR19.1
$define RPINR19bits_U2RXR2 RPINR19.2
$define RPINR19bits_U2RXR3 RPINR19.3
$define RPINR19bits_U2RXR4 RPINR19.4
$define RPINR19bits_U2RXR5 RPINR19.5
$define RPINR19bits_U2RXR6 RPINR19.6

' RPINR22 Bits
$define RPINR22bits_SDI2R RPINR22.Byte0
$define RPINR22bits_SDI2R0 RPINR22.0
$define RPINR22bits_SDI2R1 RPINR22.1
$define RPINR22bits_SDI2R2 RPINR22.2
$define RPINR22bits_SDI2R3 RPINR22.3
$define RPINR22bits_SDI2R4 RPINR22.4
$define RPINR22bits_SDI2R5 RPINR22.5
$define RPINR22bits_SDI2R6 RPINR22.6
$define RPINR22bits_SCK2R RPINR22.Byte1
$define RPINR22bits_SCK2R0 RPINR22.8
$define RPINR22bits_SCK2R1 RPINR22.9
$define RPINR22bits_SCK2R2 RPINR22.10
$define RPINR22bits_SCK2R3 RPINR22.11
$define RPINR22bits_SCK2R4 RPINR22.12
$define RPINR22bits_SCK2R5 RPINR22.13
$define RPINR22bits_SCK2R6 RPINR22.14

' RPINR23 Bits
$define RPINR23bits_SS2R RPINR23.Byte0
$define RPINR23bits_SS2R0 RPINR23.0
$define RPINR23bits_SS2R1 RPINR23.1
$define RPINR23bits_SS2R2 RPINR23.2
$define RPINR23bits_SS2R3 RPINR23.3
$define RPINR23bits_SS2R4 RPINR23.4
$define RPINR23bits_SS2R5 RPINR23.5
$define RPINR23bits_SS2R6 RPINR23.6

' RPINR37 Bits
$define RPINR37bits_SYNCI1R RPINR37.Byte1
$define RPINR37bits_SYNCI1R0 RPINR37.8
$define RPINR37bits_SYNCI1R1 RPINR37.9
$define RPINR37bits_SYNCI1R2 RPINR37.10
$define RPINR37bits_SYNCI1R3 RPINR37.11
$define RPINR37bits_SYNCI1R4 RPINR37.12
$define RPINR37bits_SYNCI1R5 RPINR37.13
$define RPINR37bits_SYNCI1R6 RPINR37.14

' RPINR38 Bits
$define RPINR38bits_DTCMP1R RPINR38.Byte1
$define RPINR38bits_DTCMP1R0 RPINR38.8
$define RPINR38bits_DTCMP1R1 RPINR38.9
$define RPINR38bits_DTCMP1R2 RPINR38.10
$define RPINR38bits_DTCMP1R3 RPINR38.11
$define RPINR38bits_DTCMP1R4 RPINR38.12
$define RPINR38bits_DTCMP1R5 RPINR38.13
$define RPINR38bits_DTCMP1R6 RPINR38.14

' RPINR39 Bits
$define RPINR39bits_DTCMP2R RPINR39.Byte0
$define RPINR39bits_DTCMP2R0 RPINR39.0
$define RPINR39bits_DTCMP2R1 RPINR39.1
$define RPINR39bits_DTCMP2R2 RPINR39.2
$define RPINR39bits_DTCMP2R3 RPINR39.3
$define RPINR39bits_DTCMP2R4 RPINR39.4
$define RPINR39bits_DTCMP2R5 RPINR39.5
$define RPINR39bits_DTCMP2R6 RPINR39.6
$define RPINR39bits_DTCMP3R RPINR39.Byte1
$define RPINR39bits_DTCMP3R0 RPINR39.8
$define RPINR39bits_DTCMP3R1 RPINR39.9
$define RPINR39bits_DTCMP3R2 RPINR39.10
$define RPINR39bits_DTCMP3R3 RPINR39.11
$define RPINR39bits_DTCMP3R4 RPINR39.12
$define RPINR39bits_DTCMP3R5 RPINR39.13
$define RPINR39bits_DTCMP3R6 RPINR39.14

' NVMCON Bits
$define NVMCONbits_NVMSIDL NVMCON.12
$define NVMCONbits_WRERR NVMCON.13
$define NVMCONbits_WREN NVMCON.14
$define NVMCONbits_WR NVMCON.15
$define NVMCONbits_NVMOP0 NVMCON.0
$define NVMCONbits_NVMOP1 NVMCON.1
$define NVMCONbits_NVMOP2 NVMCON.2
$define NVMCONbits_NVMOP3 NVMCON.3

' RCON Bits
$define RCONbits_POR RCON.0
$define RCONbits_BOR RCON.1
$define RCONbits_IDLE RCON.2
$define RCONbits_SLEEP RCON.3
$define RCONbits_WDTO RCON.4
$define RCONbits_SWDTEN RCON.5
$define RCONbits_SWR RCON.6
$define RCONbits_EXTR RCON.7
$define RCONbits_VREGS RCON.8
$define RCONbits_CM RCON.9
$define RCONbits_VREGSF RCON.11
$define RCONbits_IOPUWR RCON.14
$define RCONbits_TRAPR RCON.15

' OSCCON Bits
$define OSCCONbits_OSWEN OSCCON.0
$define OSCCONbits_CF OSCCON.3
$define OSCCONbits_LOCK OSCCON.5
$define OSCCONbits_IOLOCK OSCCON.6
$define OSCCONbits_CLKLOCK OSCCON.7
$define OSCCONbits_NOSC0 OSCCON.8
$define OSCCONbits_NOSC1 OSCCON.9
$define OSCCONbits_NOSC2 OSCCON.10
$define OSCCONbits_COSC0 OSCCON.12
$define OSCCONbits_COSC1 OSCCON.13
$define OSCCONbits_COSC2 OSCCON.14

' CLKDIV Bits
$define CLKDIVbits_DOZEN CLKDIV.11
$define CLKDIVbits_ROI CLKDIV.15
$define CLKDIVbits_PLLPRE0 CLKDIV.0
$define CLKDIVbits_PLLPRE1 CLKDIV.1
$define CLKDIVbits_PLLPRE2 CLKDIV.2
$define CLKDIVbits_PLLPRE3 CLKDIV.3
$define CLKDIVbits_PLLPRE4 CLKDIV.4
$define CLKDIVbits_PLLPOST0 CLKDIV.6
$define CLKDIVbits_PLLPOST1 CLKDIV.7
$define CLKDIVbits_FRCDIV0 CLKDIV.8
$define CLKDIVbits_FRCDIV1 CLKDIV.9
$define CLKDIVbits_FRCDIV2 CLKDIV.10
$define CLKDIVbits_DOZE0 CLKDIV.12
$define CLKDIVbits_DOZE1 CLKDIV.13
$define CLKDIVbits_DOZE2 CLKDIV.14

' PLLFBD Bits
$define PLLFBDbits_PLLDIV0 PLLFBD.0
$define PLLFBDbits_PLLDIV1 PLLFBD.1
$define PLLFBDbits_PLLDIV2 PLLFBD.2
$define PLLFBDbits_PLLDIV3 PLLFBD.3
$define PLLFBDbits_PLLDIV4 PLLFBD.4
$define PLLFBDbits_PLLDIV5 PLLFBD.5
$define PLLFBDbits_PLLDIV6 PLLFBD.6
$define PLLFBDbits_PLLDIV7 PLLFBD.7
$define PLLFBDbits_PLLDIV8 PLLFBD.8

' OSCTUN Bits
$define OSCTUNbits_TUN0 OSCTUN.0
$define OSCTUNbits_TUN1 OSCTUN.1
$define OSCTUNbits_TUN2 OSCTUN.2
$define OSCTUNbits_TUN3 OSCTUN.3
$define OSCTUNbits_TUN4 OSCTUN.4
$define OSCTUNbits_TUN5 OSCTUN.5

' REFOCON Bits
$define REFOCONbits_ROSEL REFOCON.12
$define REFOCONbits_ROSSLP REFOCON.13
$define REFOCONbits_ROON REFOCON.15
$define REFOCONbits_RODIV0 REFOCON.8
$define REFOCONbits_RODIV1 REFOCON.9
$define REFOCONbits_RODIV2 REFOCON.10
$define REFOCONbits_RODIV3 REFOCON.11

' PMD1 Bits
$define PMD1bits_AD1MD PMD1.0
$define PMD1bits_SPI1MD PMD1.3
$define PMD1bits_SPI2MD PMD1.4
$define PMD1bits_U1MD PMD1.5
$define PMD1bits_U2MD PMD1.6
$define PMD1bits_I2C1MD PMD1.7
$define PMD1bits_PWMMD PMD1.9
$define PMD1bits_QEI1MD PMD1.10
$define PMD1bits_T1MD PMD1.11
$define PMD1bits_T2MD PMD1.12
$define PMD1bits_T3MD PMD1.13
$define PMD1bits_T4MD PMD1.14
$define PMD1bits_T5MD PMD1.15

' PMD2 Bits
$define PMD2bits_OC1MD PMD2.0
$define PMD2bits_OC2MD PMD2.1
$define PMD2bits_OC3MD PMD2.2
$define PMD2bits_OC4MD PMD2.3
$define PMD2bits_IC1MD PMD2.8
$define PMD2bits_IC2MD PMD2.9
$define PMD2bits_IC3MD PMD2.10
$define PMD2bits_IC4MD PMD2.11

' PMD3 Bits
$define PMD3bits_I2C2MD PMD3.1
$define PMD3bits_CRCMD PMD3.7
$define PMD3bits_CMPMD PMD3.10

' PMD4 Bits
$define PMD4bits_CTMUMD PMD4.2
$define PMD4bits_REFOMD PMD4.3

' PMD6 Bits
$define PMD6bits_PWM1MD PMD6.8
$define PMD6bits_PWM2MD PMD6.9
$define PMD6bits_PWM3MD PMD6.10

' PMD7 Bits
$define PMD7bits_PTGMD PMD7.3
$define PMD7bits_DMA0MD PMD7.4
$define PMD7bits_DMA1MD PMD7.4
$define PMD7bits_DMA5MD PMD7.5
$define PMD7bits_DMA9MD PMD7.6
$define PMD7bits_DMA13MD PMD7.7
$define PMD7bits_DMA2MD PMD7.4
$define PMD7bits_DMA6MD PMD7.5
$define PMD7bits_DMA10MD PMD7.6
$define PMD7bits_DMA14MD PMD7.7
$define PMD7bits_DMA3MD PMD7.4
$define PMD7bits_DMA7MD PMD7.5
$define PMD7bits_DMA11MD PMD7.6

' IFS0 Bits
$define IFS0bits_INT0IF IFS0.0
$define IFS0bits_IC1IF IFS0.1
$define IFS0bits_OC1IF IFS0.2
$define IFS0bits_T1IF IFS0.3
$define IFS0bits_DMA0IF IFS0.4
$define IFS0bits_IC2IF IFS0.5
$define IFS0bits_OC2IF IFS0.6
$define IFS0bits_T2IF IFS0.7
$define IFS0bits_T3IF IFS0.8
$define IFS0bits_SPI1EIF IFS0.9
$define IFS0bits_SPI1IF IFS0.10
$define IFS0bits_U1RXIF IFS0.11
$define IFS0bits_U1TXIF IFS0.12
$define IFS0bits_AD1IF IFS0.13
$define IFS0bits_DMA1IF IFS0.14

' IFS1 Bits
$define IFS1bits_SI2C1IF IFS1.0
$define IFS1bits_MI2C1IF IFS1.1
$define IFS1bits_CMIF IFS1.2
$define IFS1bits_CNIF IFS1.3
$define IFS1bits_INT1IF IFS1.4
$define IFS1bits_DMA2IF IFS1.8
$define IFS1bits_OC3IF IFS1.9
$define IFS1bits_OC4IF IFS1.10
$define IFS1bits_T4IF IFS1.11
$define IFS1bits_T5IF IFS1.12
$define IFS1bits_INT2IF IFS1.13
$define IFS1bits_U2RXIF IFS1.14
$define IFS1bits_U2TXIF IFS1.15

' IFS2 Bits
$define IFS2bits_SPI2EIF IFS2.0
$define IFS2bits_SPI2IF IFS2.1
$define IFS2bits_DMA3IF IFS2.4
$define IFS2bits_IC3IF IFS2.5
$define IFS2bits_IC4IF IFS2.6

' IFS3 Bits
$define IFS3bits_SI2C2IF IFS3.1
$define IFS3bits_MI2C2IF IFS3.2
$define IFS3bits_PSEMIF IFS3.9
$define IFS3bits_QEI1IF IFS3.10

' IFS4 Bits
$define IFS4bits_U1EIF IFS4.1
$define IFS4bits_U2EIF IFS4.2
$define IFS4bits_CRCIF IFS4.3
$define IFS4bits_CTMUIF IFS4.13

' IFS5 Bits
$define IFS5bits_PWM1IF IFS5.14
$define IFS5bits_PWM2IF IFS5.15

' IFS6 Bits
$define IFS6bits_PWM3IF IFS6.0

' IFS8 Bits
$define IFS8bits_ICDIF IFS8.14
$define IFS8bits_JTAGIF IFS8.15

' IFS9 Bits
$define IFS9bits_PTGSTEPIF IFS9.1
$define IFS9bits_PTGWDTIF IFS9.2
$define IFS9bits_PTG0IF IFS9.3
$define IFS9bits_PTG1IF IFS9.4
$define IFS9bits_PTG2IF IFS9.5
$define IFS9bits_PTG3IF IFS9.6

' IEC0 Bits
$define IEC0bits_INT0IE IEC0.0
$define IEC0bits_IC1IE IEC0.1
$define IEC0bits_OC1IE IEC0.2
$define IEC0bits_T1IE IEC0.3
$define IEC0bits_DMA0IE IEC0.4
$define IEC0bits_IC2IE IEC0.5
$define IEC0bits_OC2IE IEC0.6
$define IEC0bits_T2IE IEC0.7
$define IEC0bits_T3IE IEC0.8
$define IEC0bits_SPI1EIE IEC0.9
$define IEC0bits_SPI1IE IEC0.10
$define IEC0bits_U1RXIE IEC0.11
$define IEC0bits_U1TXIE IEC0.12
$define IEC0bits_AD1IE IEC0.13
$define IEC0bits_DMA1IE IEC0.14

' IEC1 Bits
$define IEC1bits_SI2C1IE IEC1.0
$define IEC1bits_MI2C1IE IEC1.1
$define IEC1bits_CMIE IEC1.2
$define IEC1bits_CNIE IEC1.3
$define IEC1bits_INT1IE IEC1.4
$define IEC1bits_DMA2IE IEC1.8
$define IEC1bits_OC3IE IEC1.9
$define IEC1bits_OC4IE IEC1.10
$define IEC1bits_T4IE IEC1.11
$define IEC1bits_T5IE IEC1.12
$define IEC1bits_INT2IE IEC1.13
$define IEC1bits_U2RXIE IEC1.14
$define IEC1bits_U2TXIE IEC1.15

' IEC2 Bits
$define IEC2bits_SPI2EIE IEC2.0
$define IEC2bits_SPI2IE IEC2.1
$define IEC2bits_DMA3IE IEC2.4
$define IEC2bits_IC3IE IEC2.5
$define IEC2bits_IC4IE IEC2.6

' IEC3 Bits
$define IEC3bits_SI2C2IE IEC3.1
$define IEC3bits_MI2C2IE IEC3.2
$define IEC3bits_PSEMIE IEC3.9
$define IEC3bits_QEI1IE IEC3.10

' IEC4 Bits
$define IEC4bits_U1EIE IEC4.1
$define IEC4bits_U2EIE IEC4.2
$define IEC4bits_CRCIE IEC4.3
$define IEC4bits_CTMUIE IEC4.13

' IEC5 Bits
$define IEC5bits_PWM1IE IEC5.14
$define IEC5bits_PWM2IE IEC5.15

' IEC6 Bits
$define IEC6bits_PWM3IE IEC6.0

' IEC8 Bits
$define IEC8bits_ICDIF IEC8.14
$define IEC8bits_JTAGIE IEC8.15

' IEC9 Bits
$define IEC9bits_PTGSTEPIE IEC9.1
$define IEC9bits_PTGWDTIE IEC9.2
$define IEC9bits_PTG0IE IEC9.3
$define IEC9bits_PTG1IE IEC9.4
$define IEC9bits_PTG2IE IEC9.5
$define IEC9bits_PTG3IE IEC9.6

' IPC0 Bits
$define IPC0bits_INT0IP0 IPC0.0
$define IPC0bits_INT0IP1 IPC0.1
$define IPC0bits_INT0IP2 IPC0.2
$define IPC0bits_IC1IP0 IPC0.4
$define IPC0bits_IC1IP1 IPC0.5
$define IPC0bits_IC1IP2 IPC0.6
$define IPC0bits_OC1IP0 IPC0.8
$define IPC0bits_OC1IP1 IPC0.9
$define IPC0bits_OC1IP2 IPC0.10
$define IPC0bits_T1IP0 IPC0.12
$define IPC0bits_T1IP1 IPC0.13
$define IPC0bits_T1IP2 IPC0.14

' IPC1 Bits
$define IPC1bits_DMA0IP0 IPC1.0
$define IPC1bits_DMA0IP1 IPC1.1
$define IPC1bits_DMA0IP2 IPC1.2
$define IPC1bits_IC2IP0 IPC1.4
$define IPC1bits_IC2IP1 IPC1.5
$define IPC1bits_IC2IP2 IPC1.6
$define IPC1bits_OC2IP0 IPC1.8
$define IPC1bits_OC2IP1 IPC1.9
$define IPC1bits_OC2IP2 IPC1.10
$define IPC1bits_T2IP0 IPC1.12
$define IPC1bits_T2IP1 IPC1.13
$define IPC1bits_T2IP2 IPC1.14

' IPC2 Bits
$define IPC2bits_T3IP0 IPC2.0
$define IPC2bits_T3IP1 IPC2.1
$define IPC2bits_T3IP2 IPC2.2
$define IPC2bits_SPI1EIP0 IPC2.4
$define IPC2bits_SPI1EIP1 IPC2.5
$define IPC2bits_SPI1EIP2 IPC2.6
$define IPC2bits_SPI1IP0 IPC2.8
$define IPC2bits_SPI1IP1 IPC2.9
$define IPC2bits_SPI1IP2 IPC2.10
$define IPC2bits_U1RXIP0 IPC2.12
$define IPC2bits_U1RXIP1 IPC2.13
$define IPC2bits_U1RXIP2 IPC2.14

' IPC3 Bits
$define IPC3bits_U1TXIP0 IPC3.0
$define IPC3bits_U1TXIP1 IPC3.1
$define IPC3bits_U1TXIP2 IPC3.2
$define IPC3bits_AD1IP0 IPC3.4
$define IPC3bits_AD1IP1 IPC3.5
$define IPC3bits_AD1IP2 IPC3.6
$define IPC3bits_DMA1IP0 IPC3.8
$define IPC3bits_DMA1IP1 IPC3.9
$define IPC3bits_DMA1IP2 IPC3.10
$define IPC3bits_NVMIP0 IPC3.12
$define IPC3bits_NVMIP1 IPC3.13
$define IPC3bits_NVMIP2 IPC3.14

' IPC4 Bits
$define IPC4bits_SI2C1IP0 IPC4.0
$define IPC4bits_SI2C1IP1 IPC4.1
$define IPC4bits_SI2C1IP2 IPC4.2
$define IPC4bits_MI2C1IP0 IPC4.4
$define IPC4bits_MI2C1IP1 IPC4.5
$define IPC4bits_MI2C1IP2 IPC4.6
$define IPC4bits_CMIP0 IPC4.8
$define IPC4bits_CMIP1 IPC4.9
$define IPC4bits_CMIP2 IPC4.10
$define IPC4bits_CNIP0 IPC4.12
$define IPC4bits_CNIP1 IPC4.13
$define IPC4bits_CNIP2 IPC4.14

' IPC5 Bits
$define IPC5bits_INT1IP0 IPC5.0
$define IPC5bits_INT1IP1 IPC5.1
$define IPC5bits_INT1IP2 IPC5.2
$define IPC5bits_AD2IP0 IPC5.4
$define IPC5bits_AD2IP1 IPC5.5
$define IPC5bits_AD2IP2 IPC5.6
$define IPC5bits_IC7IP0 IPC5.8
$define IPC5bits_IC7IP1 IPC5.9
$define IPC5bits_IC7IP2 IPC5.10
$define IPC5bits_IC8IP0 IPC5.12
$define IPC5bits_IC8IP1 IPC5.13
$define IPC5bits_IC8IP2 IPC5.14

' IPC6 Bits
$define IPC6bits_DMA2IP0 IPC6.0
$define IPC6bits_DMA2IP1 IPC6.1
$define IPC6bits_DMA2IP2 IPC6.2
$define IPC6bits_OC3IP0 IPC6.4
$define IPC6bits_OC3IP1 IPC6.5
$define IPC6bits_OC3IP2 IPC6.6
$define IPC6bits_OC4IP0 IPC6.8
$define IPC6bits_OC4IP1 IPC6.9
$define IPC6bits_OC4IP2 IPC6.10
$define IPC6bits_T4IP0 IPC6.12
$define IPC6bits_T4IP1 IPC6.13
$define IPC6bits_T4IP2 IPC6.14

' IPC7 Bits
$define IPC7bits_T5IP0 IPC7.0
$define IPC7bits_T5IP1 IPC7.1
$define IPC7bits_T5IP2 IPC7.2
$define IPC7bits_INT2IP0 IPC7.4
$define IPC7bits_INT2IP1 IPC7.5
$define IPC7bits_INT2IP2 IPC7.6
$define IPC7bits_U2RXIP0 IPC7.8
$define IPC7bits_U2RXIP1 IPC7.9
$define IPC7bits_U2RXIP2 IPC7.10
$define IPC7bits_U2TXIP0 IPC7.12
$define IPC7bits_U2TXIP1 IPC7.13
$define IPC7bits_U2TXIP2 IPC7.14

' IPC8 Bits
$define IPC8bits_SPI2EIP0 IPC8.0
$define IPC8bits_SPI2EIP1 IPC8.1
$define IPC8bits_SPI2EIP2 IPC8.2
$define IPC8bits_SPI2IP0 IPC8.4
$define IPC8bits_SPI2IP1 IPC8.5
$define IPC8bits_SPI2IP2 IPC8.6

' IPC9 Bits
$define IPC9bits_DMA3IP0 IPC9.0
$define IPC9bits_DMA3IP1 IPC9.1
$define IPC9bits_DMA3IP2 IPC9.2
$define IPC9bits_IC3IP0 IPC9.4
$define IPC9bits_IC3IP1 IPC9.5
$define IPC9bits_IC3IP2 IPC9.6
$define IPC9bits_IC4IP0 IPC9.8
$define IPC9bits_IC4IP1 IPC9.9
$define IPC9bits_IC4IP2 IPC9.10
$define IPC9bits_IC5IP0 IPC9.12
$define IPC9bits_IC5IP1 IPC9.13
$define IPC9bits_IC5IP2 IPC9.14

' IPC12 Bits
$define IPC12bits_T7IP0 IPC12.0
$define IPC12bits_T7IP1 IPC12.1
$define IPC12bits_T7IP2 IPC12.2
$define IPC12bits_SI2C2IP0 IPC12.4
$define IPC12bits_SI2C2IP1 IPC12.5
$define IPC12bits_SI2C2IP2 IPC12.6
$define IPC12bits_MI2C2IP0 IPC12.8
$define IPC12bits_MI2C2IP1 IPC12.9
$define IPC12bits_MI2C2IP2 IPC12.10
$define IPC12bits_T8IP0 IPC12.12
$define IPC12bits_T8IP1 IPC12.13
$define IPC12bits_T8IP2 IPC12.14

' IPC14 Bits
$define IPC14bits_C2IP0 IPC14.0
$define IPC14bits_C2IP1 IPC14.1
$define IPC14bits_C2IP2 IPC14.2
$define IPC14bits_PSEMIP0 IPC14.4
$define IPC14bits_PSEMIP1 IPC14.5
$define IPC14bits_PSEMIP2 IPC14.6
$define IPC14bits_QEI1IP0 IPC14.8
$define IPC14bits_QEI1IP1 IPC14.9
$define IPC14bits_QEI1IP2 IPC14.10
$define IPC14bits_DCIEIP0 IPC14.12
$define IPC14bits_DCIEIP1 IPC14.13
$define IPC14bits_DCIEIP2 IPC14.14

' IPC16 Bits
$define IPC16bits_U1EIP0 IPC16.4
$define IPC16bits_U1EIP1 IPC16.5
$define IPC16bits_U1EIP2 IPC16.6
$define IPC16bits_U2EIP0 IPC16.8
$define IPC16bits_U2EIP1 IPC16.9
$define IPC16bits_U2EIP2 IPC16.10
$define IPC16bits_CRCIP0 IPC16.12
$define IPC16bits_CRCIP1 IPC16.13
$define IPC16bits_CRCIP2 IPC16.14

' IPC23 Bits
$define IPC23bits_OC9IP0 IPC23.0
$define IPC23bits_OC9IP1 IPC23.1
$define IPC23bits_OC9IP2 IPC23.2
$define IPC23bits_IC9IP0 IPC23.4
$define IPC23bits_IC9IP1 IPC23.5
$define IPC23bits_IC9IP2 IPC23.6
$define IPC23bits_PWM1IP0 IPC23.8
$define IPC23bits_PWM1IP1 IPC23.9
$define IPC23bits_PWM1IP2 IPC23.10
$define IPC23bits_PWM2IP0 IPC23.12
$define IPC23bits_PWM2IP1 IPC23.13
$define IPC23bits_PWM2IP2 IPC23.14

' IPC24 Bits
$define IPC24bits_PWM3IP0 IPC24.0
$define IPC24bits_PWM3IP1 IPC24.1
$define IPC24bits_PWM3IP2 IPC24.2
$define IPC24bits_PWM4IP0 IPC24.4
$define IPC24bits_PWM4IP1 IPC24.5
$define IPC24bits_PWM4IP2 IPC24.6
$define IPC24bits_PWM5IP0 IPC24.8
$define IPC24bits_PWM5IP1 IPC24.9
$define IPC24bits_PWM5IP2 IPC24.10
$define IPC24bits_PWM6IP0 IPC24.12
$define IPC24bits_PWM6IP1 IPC24.13
$define IPC24bits_PWM6IP2 IPC24.14

' IPC35 Bits
$define IPC35bits_OC16IP0 IPC35.0
$define IPC35bits_OC16IP1 IPC35.1
$define IPC35bits_OC16IP2 IPC35.2
$define IPC35bits_IC16IP0 IPC35.4
$define IPC35bits_IC16IP1 IPC35.5
$define IPC35bits_IC16IP2 IPC35.6
$define IPC35bits_ICDIP0 IPC35.8
$define IPC35bits_ICDIP1 IPC35.9
$define IPC35bits_ICDIP2 IPC35.10

' INTCON1 Bits
$define INTCON1bits_OSCFAIL INTCON1.1
$define INTCON1bits_STKERR INTCON1.2
$define INTCON1bits_ADDRERR INTCON1.3
$define INTCON1bits_MATHERR INTCON1.4
$define INTCON1bits_DMACERR INTCON1.5
$define INTCON1bits_DIV0ERR INTCON1.6
$define INTCON1bits_OVBERR INTCON1.13
$define INTCON1bits_OVAERR INTCON1.14
$define INTCON1bits_NSTDIS INTCON1.15

' INTCON2 Bits
$define INTCON2bits_INT0EP INTCON2.0
$define INTCON2bits_INT1EP INTCON2.1
$define INTCON2bits_INT2EP INTCON2.2
$define INTCON2bits_SWTRAP INTCON2.13
$define INTCON2bits_DISI INTCON2.14
$define INTCON2bits_GIE INTCON2.15

' INTCON3 Bits
$define INTCON3bits_DOOVR INTCON3.4
$define INTCON3bits_DAE INTCON3.5

' INTCON4 Bits
$define INTCON4bits_SGHT INTCON4.0

' INTTREG Bits
$define INTTREGbits_VECNUM0 INTTREG.0
$define INTTREGbits_VECNUM1 INTTREG.1
$define INTTREGbits_VECNUM2 INTTREG.2
$define INTTREGbits_VECNUM3 INTTREG.3
$define INTTREGbits_VECNUM4 INTTREG.4
$define INTTREGbits_VECNUM5 INTTREG.5
$define INTTREGbits_VECNUM6 INTTREG.6
$define INTTREGbits_VECNUM7 INTTREG.7
$define INTTREGbits_ILR0 INTTREG.8
$define INTTREGbits_ILR1 INTTREG.9
$define INTTREGbits_ILR2 INTTREG.10
$define INTTREGbits_ILR3 INTTREG.11

' OC1CON1 Bits
$define OC1CON1bits_TRIGMODE OC1CON1.3
$define OC1CON1bits_OCFLTA OC1CON1.4
$define OC1CON1bits_OCFLTB OC1CON1.5
$define OC1CON1bits_ENFLTA OC1CON1.7
$define OC1CON1bits_ENFLTB OC1CON1.8
$define OC1CON1bits_OCSIDL OC1CON1.13
$define OC1CON1bits_OCM0 OC1CON1.0
$define OC1CON1bits_OCM1 OC1CON1.1
$define OC1CON1bits_OCM2 OC1CON1.2
$define OC1CON1bits_OCTSEL0 OC1CON1.10
$define OC1CON1bits_OCTSEL1 OC1CON1.11
$define OC1CON1bits_OCTSEL2 OC1CON1.12
$define OC1CON1bits_OCFLT0 OC1CON1.4
$define OC1CON1bits_OCFLT1 OC1CON1.5
$define OC1CON1bits_ENFLT0 OC1CON1.7
$define OC1CON1bits_ENFLT1 OC1CON1.8

' OC1CON2 Bits
$define OC1CON2bits_OCTRIS OC1CON2.5
$define OC1CON2bits_TRIGSTAT OC1CON2.6
$define OC1CON2bits_OCTRIG OC1CON2.7
$define OC1CON2bits_OC32 OC1CON2.8
$define OC1CON2bits_OCINV OC1CON2.12
$define OC1CON2bits_FLTTRIEN OC1CON2.13
$define OC1CON2bits_FLTOUT OC1CON2.14
$define OC1CON2bits_FLTMD OC1CON2.15
$define OC1CON2bits_SYNCSEL0 OC1CON2.0
$define OC1CON2bits_SYNCSEL1 OC1CON2.1
$define OC1CON2bits_SYNCSEL2 OC1CON2.2
$define OC1CON2bits_SYNCSEL3 OC1CON2.3
$define OC1CON2bits_SYNCSEL4 OC1CON2.4
$define OC1CON2bits_FLTMODE OC1CON2.14

' OC2CON1 Bits
$define OC2CON1bits_TRIGMODE OC2CON1.3
$define OC2CON1bits_OCFLTA OC2CON1.4
$define OC2CON1bits_OCFLTB OC2CON1.5
$define OC2CON1bits_ENFLTA OC2CON1.7
$define OC2CON1bits_ENFLTB OC2CON1.8
$define OC2CON1bits_OCSIDL OC2CON1.13
$define OC2CON1bits_OCM0 OC2CON1.0
$define OC2CON1bits_OCM1 OC2CON1.1
$define OC2CON1bits_OCM2 OC2CON1.2
$define OC2CON1bits_OCTSEL0 OC2CON1.10
$define OC2CON1bits_OCTSEL1 OC2CON1.11
$define OC2CON1bits_OCTSEL2 OC2CON1.12
$define OC2CON1bits_OCFLT0 OC2CON1.4
$define OC2CON1bits_OCFLT1 OC2CON1.5
$define OC2CON1bits_ENFLT0 OC2CON1.7
$define OC2CON1bits_ENFLT1 OC2CON1.8

' OC2CON2 Bits
$define OC2CON2bits_OCTRIS OC2CON2.5
$define OC2CON2bits_TRIGSTAT OC2CON2.6
$define OC2CON2bits_OCTRIG OC2CON2.7
$define OC2CON2bits_OC32 OC2CON2.8
$define OC2CON2bits_OCINV OC2CON2.12
$define OC2CON2bits_FLTTRIEN OC2CON2.13
$define OC2CON2bits_FLTOUT OC2CON2.14
$define OC2CON2bits_FLTMD OC2CON2.15
$define OC2CON2bits_SYNCSEL0 OC2CON2.0
$define OC2CON2bits_SYNCSEL1 OC2CON2.1
$define OC2CON2bits_SYNCSEL2 OC2CON2.2
$define OC2CON2bits_SYNCSEL3 OC2CON2.3
$define OC2CON2bits_SYNCSEL4 OC2CON2.4
$define OC2CON2bits_FLTMODE OC2CON2.14

' OC3CON1 Bits
$define OC3CON1bits_TRIGMODE OC3CON1.3
$define OC3CON1bits_OCFLTA OC3CON1.4
$define OC3CON1bits_OCFLTB OC3CON1.5
$define OC3CON1bits_ENFLTA OC3CON1.7
$define OC3CON1bits_ENFLTB OC3CON1.8
$define OC3CON1bits_OCSIDL OC3CON1.13
$define OC3CON1bits_OCM0 OC3CON1.0
$define OC3CON1bits_OCM1 OC3CON1.1
$define OC3CON1bits_OCM2 OC3CON1.2
$define OC3CON1bits_OCTSEL0 OC3CON1.10
$define OC3CON1bits_OCTSEL1 OC3CON1.11
$define OC3CON1bits_OCTSEL2 OC3CON1.12
$define OC3CON1bits_OCFLT0 OC3CON1.4
$define OC3CON1bits_OCFLT1 OC3CON1.5
$define OC3CON1bits_ENFLT0 OC3CON1.7
$define OC3CON1bits_ENFLT1 OC3CON1.8

' OC3CON2 Bits
$define OC3CON2bits_OCTRIS OC3CON2.5
$define OC3CON2bits_TRIGSTAT OC3CON2.6
$define OC3CON2bits_OCTRIG OC3CON2.7
$define OC3CON2bits_OC32 OC3CON2.8
$define OC3CON2bits_OCINV OC3CON2.12
$define OC3CON2bits_FLTTRIEN OC3CON2.13
$define OC3CON2bits_FLTOUT OC3CON2.14
$define OC3CON2bits_FLTMD OC3CON2.15
$define OC3CON2bits_SYNCSEL0 OC3CON2.0
$define OC3CON2bits_SYNCSEL1 OC3CON2.1
$define OC3CON2bits_SYNCSEL2 OC3CON2.2
$define OC3CON2bits_SYNCSEL3 OC3CON2.3
$define OC3CON2bits_SYNCSEL4 OC3CON2.4
$define OC3CON2bits_FLTMODE OC3CON2.14

' OC4CON1 Bits
$define OC4CON1bits_TRIGMODE OC4CON1.3
$define OC4CON1bits_OCFLTA OC4CON1.4
$define OC4CON1bits_OCFLTB OC4CON1.5
$define OC4CON1bits_ENFLTA OC4CON1.7
$define OC4CON1bits_ENFLTB OC4CON1.8
$define OC4CON1bits_OCSIDL OC4CON1.13
$define OC4CON1bits_OCM0 OC4CON1.0
$define OC4CON1bits_OCM1 OC4CON1.1
$define OC4CON1bits_OCM2 OC4CON1.2
$define OC4CON1bits_OCTSEL0 OC4CON1.10
$define OC4CON1bits_OCTSEL1 OC4CON1.11
$define OC4CON1bits_OCTSEL2 OC4CON1.12
$define OC4CON1bits_OCFLT0 OC4CON1.4
$define OC4CON1bits_OCFLT1 OC4CON1.5
$define OC4CON1bits_ENFLT0 OC4CON1.7
$define OC4CON1bits_ENFLT1 OC4CON1.8

' OC4CON2 Bits
$define OC4CON2bits_OCTRIS OC4CON2.5
$define OC4CON2bits_TRIGSTAT OC4CON2.6
$define OC4CON2bits_OCTRIG OC4CON2.7
$define OC4CON2bits_OC32 OC4CON2.8
$define OC4CON2bits_OCINV OC4CON2.12
$define OC4CON2bits_FLTTRIEN OC4CON2.13
$define OC4CON2bits_FLTOUT OC4CON2.14
$define OC4CON2bits_FLTMD OC4CON2.15
$define OC4CON2bits_SYNCSEL0 OC4CON2.0
$define OC4CON2bits_SYNCSEL1 OC4CON2.1
$define OC4CON2bits_SYNCSEL2 OC4CON2.2
$define OC4CON2bits_SYNCSEL3 OC4CON2.3
$define OC4CON2bits_SYNCSEL4 OC4CON2.4
$define OC4CON2bits_FLTMODE OC4CON2.14

' CMSTAT Bits
$define CMSTATbits_C1OUT CMSTAT.0
$define CMSTATbits_C2OUT CMSTAT.1
$define CMSTATbits_C3OUT CMSTAT.2
$define CMSTATbits_C4OUT CMSTAT.3
$define CMSTATbits_C1EVT CMSTAT.8
$define CMSTATbits_C2EVT CMSTAT.9
$define CMSTATbits_C3EVT CMSTAT.10
$define CMSTATbits_C4EVT CMSTAT.11
$define CMSTATbits_CMSIDL CMSTAT.15

' CVRCON Bits
$define CVRCONbits_CVRSS CVRCON.4
$define CVRCONbits_CVRR CVRCON.5
$define CVRCONbits_CVROE CVRCON.6
$define CVRCONbits_CVREN CVRCON.7
$define CVRCONbits_VREFSEL CVRCON.10
$define CVRCONbits_CVR2OE CVRCON.14
$define CVRCONbits_CVR0 CVRCON.0
$define CVRCONbits_CVR1 CVRCON.1
$define CVRCONbits_CVR2 CVRCON.2
$define CVRCONbits_CVR3 CVRCON.3
$define CVRCONbits_CVR1OE CVRCON.6
$define CVRCONbits_BGSEL0 CVRCON.8
$define CVRCONbits_BGSEL1 CVRCON.9

' CM1CON Bits
$define CM1CONbits_CREF CM1CON.4
$define CM1CONbits_COUT CM1CON.8
$define CM1CONbits_CEVT CM1CON.9
$define CM1CONbits_OPMODE CM1CON.10
$define CM1CONbits_CPOL CM1CON.13
$define CM1CONbits_COE CM1CON.14
$define CM1CONbits_CON CM1CON.15
$define CM1CONbits_CCH0 CM1CON.0
$define CM1CONbits_CCH1 CM1CON.1
$define CM1CONbits_EVPOL0 CM1CON.6
$define CM1CONbits_EVPOL1 CM1CON.7
$define CM1CONbits_CEN CM1CON.15

' CM1MSKSRC Bits
$define CM1MSKSRCbits_SELSRCA0 CM1MSKSRC.0
$define CM1MSKSRCbits_SELSRCA1 CM1MSKSRC.1
$define CM1MSKSRCbits_SELSRCA2 CM1MSKSRC.2
$define CM1MSKSRCbits_SELSRCA3 CM1MSKSRC.3
$define CM1MSKSRCbits_SELSRCB0 CM1MSKSRC.4
$define CM1MSKSRCbits_SELSRCB1 CM1MSKSRC.5
$define CM1MSKSRCbits_SELSRCB2 CM1MSKSRC.6
$define CM1MSKSRCbits_SELSRCB3 CM1MSKSRC.7
$define CM1MSKSRCbits_SELSRCC0 CM1MSKSRC.8
$define CM1MSKSRCbits_SELSRCC1 CM1MSKSRC.9
$define CM1MSKSRCbits_SELSRCC2 CM1MSKSRC.10
$define CM1MSKSRCbits_SELSRCC3 CM1MSKSRC.11

' CM1MSKCON Bits
$define CM1MSKCONbits_AANEN CM1MSKCON.0
$define CM1MSKCONbits_AAEN CM1MSKCON.1
$define CM1MSKCONbits_ABNEN CM1MSKCON.2
$define CM1MSKCONbits_ABEN CM1MSKCON.3
$define CM1MSKCONbits_ACNEN CM1MSKCON.4
$define CM1MSKCONbits_ACEN CM1MSKCON.5
$define CM1MSKCONbits_PAGS CM1MSKCON.6
$define CM1MSKCONbits_NAGS CM1MSKCON.7
$define CM1MSKCONbits_OANEN CM1MSKCON.8
$define CM1MSKCONbits_OAEN CM1MSKCON.9
$define CM1MSKCONbits_OBNEN CM1MSKCON.10
$define CM1MSKCONbits_OBEN CM1MSKCON.11
$define CM1MSKCONbits_OCNEN CM1MSKCON.12
$define CM1MSKCONbits_OCEN CM1MSKCON.13
$define CM1MSKCONbits_HLMS CM1MSKCON.15

' CM1FLTR Bits
$define CM1FLTRbits_CFLTREN CM1FLTR.3
$define CM1FLTRbits_CFDIV0 CM1FLTR.0
$define CM1FLTRbits_CFDIV1 CM1FLTR.1
$define CM1FLTRbits_CFDIV2 CM1FLTR.2
$define CM1FLTRbits_CFSEL0 CM1FLTR.4
$define CM1FLTRbits_CFSEL1 CM1FLTR.5
$define CM1FLTRbits_CFSEL2 CM1FLTR.6

' CM2CON Bits
$define CM2CONbits_CREF CM2CON.4
$define CM2CONbits_COUT CM2CON.8
$define CM2CONbits_CEVT CM2CON.9
$define CM2CONbits_OPMODE CM2CON.10
$define CM2CONbits_CPOL CM2CON.13
$define CM2CONbits_COE CM2CON.14
$define CM2CONbits_CON CM2CON.15
$define CM2CONbits_CCH0 CM2CON.0
$define CM2CONbits_CCH1 CM2CON.1
$define CM2CONbits_EVPOL0 CM2CON.6
$define CM2CONbits_EVPOL1 CM2CON.7
$define CM2CONbits_CEN CM2CON.15

' CM2MSKSRC Bits
$define CM2MSKSRCbits_SELSRCA0 CM2MSKSRC.0
$define CM2MSKSRCbits_SELSRCA1 CM2MSKSRC.1
$define CM2MSKSRCbits_SELSRCA2 CM2MSKSRC.2
$define CM2MSKSRCbits_SELSRCA3 CM2MSKSRC.3
$define CM2MSKSRCbits_SELSRCB0 CM2MSKSRC.4
$define CM2MSKSRCbits_SELSRCB1 CM2MSKSRC.5
$define CM2MSKSRCbits_SELSRCB2 CM2MSKSRC.6
$define CM2MSKSRCbits_SELSRCB3 CM2MSKSRC.7
$define CM2MSKSRCbits_SELSRCC0 CM2MSKSRC.8
$define CM2MSKSRCbits_SELSRCC1 CM2MSKSRC.9
$define CM2MSKSRCbits_SELSRCC2 CM2MSKSRC.10
$define CM2MSKSRCbits_SELSRCC3 CM2MSKSRC.11

' CM2MSKCON Bits
$define CM2MSKCONbits_AANEN CM2MSKCON.0
$define CM2MSKCONbits_AAEN CM2MSKCON.1
$define CM2MSKCONbits_ABNEN CM2MSKCON.2
$define CM2MSKCONbits_ABEN CM2MSKCON.3
$define CM2MSKCONbits_ACNEN CM2MSKCON.4
$define CM2MSKCONbits_ACEN CM2MSKCON.5
$define CM2MSKCONbits_PAGS CM2MSKCON.6
$define CM2MSKCONbits_NAGS CM2MSKCON.7
$define CM2MSKCONbits_OANEN CM2MSKCON.8
$define CM2MSKCONbits_OAEN CM2MSKCON.9
$define CM2MSKCONbits_OBNEN CM2MSKCON.10
$define CM2MSKCONbits_OBEN CM2MSKCON.11
$define CM2MSKCONbits_OCNEN CM2MSKCON.12
$define CM2MSKCONbits_OCEN CM2MSKCON.13
$define CM2MSKCONbits_HLMS CM2MSKCON.15

' CM2FLTR Bits
$define CM2FLTRbits_CFLTREN CM2FLTR.3
$define CM2FLTRbits_CFDIV0 CM2FLTR.0
$define CM2FLTRbits_CFDIV1 CM2FLTR.1
$define CM2FLTRbits_CFDIV2 CM2FLTR.2
$define CM2FLTRbits_CFSEL0 CM2FLTR.4
$define CM2FLTRbits_CFSEL1 CM2FLTR.5
$define CM2FLTRbits_CFSEL2 CM2FLTR.6

' CM3CON Bits
$define CM3CONbits_CREF CM3CON.4
$define CM3CONbits_COUT CM3CON.8
$define CM3CONbits_CEVT CM3CON.9
$define CM3CONbits_OPMODE CM3CON.10
$define CM3CONbits_CPOL CM3CON.13
$define CM3CONbits_COE CM3CON.14
$define CM3CONbits_CON CM3CON.15
$define CM3CONbits_CCH0 CM3CON.0
$define CM3CONbits_CCH1 CM3CON.1
$define CM3CONbits_EVPOL0 CM3CON.6
$define CM3CONbits_EVPOL1 CM3CON.7
$define CM3CONbits_CEN CM3CON.15

' CM3MSKSRC Bits
$define CM3MSKSRCbits_SELSRCA0 CM3MSKSRC.0
$define CM3MSKSRCbits_SELSRCA1 CM3MSKSRC.1
$define CM3MSKSRCbits_SELSRCA2 CM3MSKSRC.2
$define CM3MSKSRCbits_SELSRCA3 CM3MSKSRC.3
$define CM3MSKSRCbits_SELSRCB0 CM3MSKSRC.4
$define CM3MSKSRCbits_SELSRCB1 CM3MSKSRC.5
$define CM3MSKSRCbits_SELSRCB2 CM3MSKSRC.6
$define CM3MSKSRCbits_SELSRCB3 CM3MSKSRC.7
$define CM3MSKSRCbits_SELSRCC0 CM3MSKSRC.8
$define CM3MSKSRCbits_SELSRCC1 CM3MSKSRC.9
$define CM3MSKSRCbits_SELSRCC2 CM3MSKSRC.10
$define CM3MSKSRCbits_SELSRCC3 CM3MSKSRC.11

' CM3MSKCON Bits
$define CM3MSKCONbits_AANEN CM3MSKCON.0
$define CM3MSKCONbits_AAEN CM3MSKCON.1
$define CM3MSKCONbits_ABNEN CM3MSKCON.2
$define CM3MSKCONbits_ABEN CM3MSKCON.3
$define CM3MSKCONbits_ACNEN CM3MSKCON.4
$define CM3MSKCONbits_ACEN CM3MSKCON.5
$define CM3MSKCONbits_PAGS CM3MSKCON.6
$define CM3MSKCONbits_NAGS CM3MSKCON.7
$define CM3MSKCONbits_OANEN CM3MSKCON.8
$define CM3MSKCONbits_OAEN CM3MSKCON.9
$define CM3MSKCONbits_OBNEN CM3MSKCON.10
$define CM3MSKCONbits_OBEN CM3MSKCON.11
$define CM3MSKCONbits_OCNEN CM3MSKCON.12
$define CM3MSKCONbits_OCEN CM3MSKCON.13
$define CM3MSKCONbits_HLMS CM3MSKCON.15

' CM3FLTR Bits
$define CM3FLTRbits_CFLTREN CM3FLTR.3
$define CM3FLTRbits_CFDIV0 CM3FLTR.0
$define CM3FLTRbits_CFDIV1 CM3FLTR.1
$define CM3FLTRbits_CFDIV2 CM3FLTR.2
$define CM3FLTRbits_CFSEL0 CM3FLTR.4
$define CM3FLTRbits_CFSEL1 CM3FLTR.5
$define CM3FLTRbits_CFSEL2 CM3FLTR.6

' CM4CON Bits
$define CM4CONbits_CREF CM4CON.4
$define CM4CONbits_COUT CM4CON.8
$define CM4CONbits_CEVT CM4CON.9
$define CM4CONbits_CPOL CM4CON.13
$define CM4CONbits_COE CM4CON.14
$define CM4CONbits_CON CM4CON.15
$define CM4CONbits_CCH0 CM4CON.0
$define CM4CONbits_CCH1 CM4CON.1
$define CM4CONbits_EVPOL0 CM4CON.6
$define CM4CONbits_EVPOL1 CM4CON.7
$define CM4CONbits_CEN CM4CON.15

' CM4MSKSRC Bits
$define CM4MSKSRCbits_SELSRCA0 CM4MSKSRC.0
$define CM4MSKSRCbits_SELSRCA1 CM4MSKSRC.1
$define CM4MSKSRCbits_SELSRCA2 CM4MSKSRC.2
$define CM4MSKSRCbits_SELSRCA3 CM4MSKSRC.3
$define CM4MSKSRCbits_SELSRCB0 CM4MSKSRC.4
$define CM4MSKSRCbits_SELSRCB1 CM4MSKSRC.5
$define CM4MSKSRCbits_SELSRCB2 CM4MSKSRC.6
$define CM4MSKSRCbits_SELSRCB3 CM4MSKSRC.7
$define CM4MSKSRCbits_SELSRCC0 CM4MSKSRC.8
$define CM4MSKSRCbits_SELSRCC1 CM4MSKSRC.9
$define CM4MSKSRCbits_SELSRCC2 CM4MSKSRC.10
$define CM4MSKSRCbits_SELSRCC3 CM4MSKSRC.11

' CM4MSKCON Bits
$define CM4MSKCONbits_AANEN CM4MSKCON.0
$define CM4MSKCONbits_AAEN CM4MSKCON.1
$define CM4MSKCONbits_ABNEN CM4MSKCON.2
$define CM4MSKCONbits_ABEN CM4MSKCON.3
$define CM4MSKCONbits_ACNEN CM4MSKCON.4
$define CM4MSKCONbits_ACEN CM4MSKCON.5
$define CM4MSKCONbits_PAGS CM4MSKCON.6
$define CM4MSKCONbits_NAGS CM4MSKCON.7
$define CM4MSKCONbits_OANEN CM4MSKCON.8
$define CM4MSKCONbits_OAEN CM4MSKCON.9
$define CM4MSKCONbits_OBNEN CM4MSKCON.10
$define CM4MSKCONbits_OBEN CM4MSKCON.11
$define CM4MSKCONbits_OCNEN CM4MSKCON.12
$define CM4MSKCONbits_OCEN CM4MSKCON.13
$define CM4MSKCONbits_HLMS CM4MSKCON.15

' CM4FLTR Bits
$define CM4FLTRbits_CFLTREN CM4FLTR.3
$define CM4FLTRbits_CFDIV0 CM4FLTR.0
$define CM4FLTRbits_CFDIV1 CM4FLTR.1
$define CM4FLTRbits_CFDIV2 CM4FLTR.2
$define CM4FLTRbits_CFSEL0 CM4FLTR.4
$define CM4FLTRbits_CFSEL1 CM4FLTR.5
$define CM4FLTRbits_CFSEL2 CM4FLTR.6

' PTGCST Bits
$define PTGCSTbits_PTGWTO PTGCST.6
$define PTGCSTbits_PTGSTRT PTGCST.7
$define PTGCSTbits_PTGIVIS PTGCST.8
$define PTGCSTbits_PTGSWT PTGCST.10
$define PTGCSTbits_PTGTOGL PTGCST.12
$define PTGCSTbits_PTGSIDL PTGCST.13
$define PTGCSTbits_PTGEN PTGCST.15
$define PTGCSTbits_SSRC0 PTGCST.5
$define PTGCSTbits_SSRC1 PTGCST.6
$define PTGCSTbits_SSRC2 PTGCST.7
$define PTGCSTbits_FORM0 PTGCST.8
$define PTGCSTbits_FORM1 PTGCST.9

' PTGBTE Bits
$define PTGBTEbits_OC1TSS PTGBTE.0
$define PTGBTEbits_OC2TSS PTGBTE.1
$define PTGBTEbits_OC3TSS PTGBTE.2
$define PTGBTEbits_OC4TSS PTGBTE.3
$define PTGBTEbits_OC1CS PTGBTE.4
$define PTGBTEbits_OC2CS PTGBTE.5
$define PTGBTEbits_OC3CS PTGBTE.6
$define PTGBTEbits_OC4CS PTGBTE.7
$define PTGBTEbits_IC1TSS PTGBTE.8
$define PTGBTEbits_IC2TSS PTGBTE.9
$define PTGBTEbits_IC3TSS PTGBTE.10
$define PTGBTEbits_IC4TSS PTGBTE.11
$define PTGBTEbits_ADCTS1 PTGBTE.12
$define PTGBTEbits_ADCTS2 PTGBTE.13
$define PTGBTEbits_ADCTS3 PTGBTE.14
$define PTGBTEbits_ADCTS4 PTGBTE.15

' DMA0CON Bits
$define DMA0CONbits_NULLW DMA0CON.11
$define DMA0CONbits_HALF DMA0CON.12
$define DMA0CONbits_DIR DMA0CON.13
$define DMA0CONbits_SIZE DMA0CON.14
$define DMA0CONbits_CHEN DMA0CON.15
$define DMA0CONbits_MODE0 DMA0CON.0
$define DMA0CONbits_MODE1 DMA0CON.1
$define DMA0CONbits_AMODE0 DMA0CON.4
$define DMA0CONbits_AMODE1 DMA0CON.5

' DMA0REQ Bits
$define DMA0REQbits_FORCE DMA0REQ.15
$define DMA0REQbits_IRQSEL0 DMA0REQ.0
$define DMA0REQbits_IRQSEL1 DMA0REQ.1
$define DMA0REQbits_IRQSEL2 DMA0REQ.2
$define DMA0REQbits_IRQSEL3 DMA0REQ.3
$define DMA0REQbits_IRQSEL4 DMA0REQ.4
$define DMA0REQbits_IRQSEL5 DMA0REQ.5
$define DMA0REQbits_IRQSEL6 DMA0REQ.6
$define DMA0REQbits_IRQSEL7 DMA0REQ.7

' DMA1CON Bits
$define DMA1CONbits_NULLW DMA1CON.11
$define DMA1CONbits_HALF DMA1CON.12
$define DMA1CONbits_DIR DMA1CON.13
$define DMA1CONbits_SIZE DMA1CON.14
$define DMA1CONbits_CHEN DMA1CON.15
$define DMA1CONbits_MODE0 DMA1CON.0
$define DMA1CONbits_MODE1 DMA1CON.1
$define DMA1CONbits_AMODE0 DMA1CON.4
$define DMA1CONbits_AMODE1 DMA1CON.5

' DMA1REQ Bits
$define DMA1REQbits_FORCE DMA1REQ.15
$define DMA1REQbits_IRQSEL0 DMA1REQ.0
$define DMA1REQbits_IRQSEL1 DMA1REQ.1
$define DMA1REQbits_IRQSEL2 DMA1REQ.2
$define DMA1REQbits_IRQSEL3 DMA1REQ.3
$define DMA1REQbits_IRQSEL4 DMA1REQ.4
$define DMA1REQbits_IRQSEL5 DMA1REQ.5
$define DMA1REQbits_IRQSEL6 DMA1REQ.6
$define DMA1REQbits_IRQSEL7 DMA1REQ.7

' DMA2CON Bits
$define DMA2CONbits_NULLW DMA2CON.11
$define DMA2CONbits_HALF DMA2CON.12
$define DMA2CONbits_DIR DMA2CON.13
$define DMA2CONbits_SIZE DMA2CON.14
$define DMA2CONbits_CHEN DMA2CON.15
$define DMA2CONbits_MODE0 DMA2CON.0
$define DMA2CONbits_MODE1 DMA2CON.1
$define DMA2CONbits_AMODE0 DMA2CON.4
$define DMA2CONbits_AMODE1 DMA2CON.5

' DMA2REQ Bits
$define DMA2REQbits_FORCE DMA2REQ.15
$define DMA2REQbits_IRQSEL0 DMA2REQ.0
$define DMA2REQbits_IRQSEL1 DMA2REQ.1
$define DMA2REQbits_IRQSEL2 DMA2REQ.2
$define DMA2REQbits_IRQSEL3 DMA2REQ.3
$define DMA2REQbits_IRQSEL4 DMA2REQ.4
$define DMA2REQbits_IRQSEL5 DMA2REQ.5
$define DMA2REQbits_IRQSEL6 DMA2REQ.6
$define DMA2REQbits_IRQSEL7 DMA2REQ.7

' DMA3CON Bits
$define DMA3CONbits_NULLW DMA3CON.11
$define DMA3CONbits_HALF DMA3CON.12
$define DMA3CONbits_DIR DMA3CON.13
$define DMA3CONbits_SIZE DMA3CON.14
$define DMA3CONbits_CHEN DMA3CON.15
$define DMA3CONbits_MODE0 DMA3CON.0
$define DMA3CONbits_MODE1 DMA3CON.1
$define DMA3CONbits_AMODE0 DMA3CON.4
$define DMA3CONbits_AMODE1 DMA3CON.5

' DMA3REQ Bits
$define DMA3REQbits_FORCE DMA3REQ.15
$define DMA3REQbits_IRQSEL0 DMA3REQ.0
$define DMA3REQbits_IRQSEL1 DMA3REQ.1
$define DMA3REQbits_IRQSEL2 DMA3REQ.2
$define DMA3REQbits_IRQSEL3 DMA3REQ.3
$define DMA3REQbits_IRQSEL4 DMA3REQ.4
$define DMA3REQbits_IRQSEL5 DMA3REQ.5
$define DMA3REQbits_IRQSEL6 DMA3REQ.6
$define DMA3REQbits_IRQSEL7 DMA3REQ.7

' DMAPWC Bits
$define DMAPWCbits_PWCOL0 DMAPWC.0
$define DMAPWCbits_PWCOL1 DMAPWC.1
$define DMAPWCbits_PWCOL2 DMAPWC.2
$define DMAPWCbits_PWCOL3 DMAPWC.3

' DMARQC Bits
$define DMARQCbits_RQCOL0 DMARQC.0
$define DMARQCbits_RQCOL1 DMARQC.1
$define DMARQCbits_RQCOL2 DMARQC.2
$define DMARQCbits_RQCOL3 DMARQC.3

' DMAPPS Bits
$define DMAPPSbits_PPST0 DMAPPS.0
$define DMAPPSbits_PPST1 DMAPPS.1
$define DMAPPSbits_PPST2 DMAPPS.2
$define DMAPPSbits_PPST3 DMAPPS.3

' DMALCA Bits
$define DMALCAbits_LSTCH0 DMALCA.0
$define DMALCAbits_LSTCH1 DMALCA.1
$define DMALCAbits_LSTCH2 DMALCA.2
$define DMALCAbits_LSTCH3 DMALCA.3

' PTCON Bits
$define PTCONbits_SYNCEN PTCON.7
$define PTCONbits_SYNCOEN PTCON.8
$define PTCONbits_SYNCPOL PTCON.9
$define PTCONbits_EIPU PTCON.10
$define PTCONbits_SEIEN PTCON.11
$define PTCONbits_SESTAT PTCON.12
$define PTCONbits_PTSIDL PTCON.13
$define PTCONbits_PTEN PTCON.15
$define PTCONbits_SEVTPS0 PTCON.0
$define PTCONbits_SEVTPS1 PTCON.1
$define PTCONbits_SEVTPS2 PTCON.2
$define PTCONbits_SEVTPS3 PTCON.3
$define PTCONbits_SYNCSRC0 PTCON.4
$define PTCONbits_SYNCSRC1 PTCON.5
$define PTCONbits_SYNCSRC2 PTCON.6

' PTCON2 Bits
$define PTCON2bits_PCLKDIV0 PTCON2.0
$define PTCON2bits_PCLKDIV1 PTCON2.1
$define PTCON2bits_PCLKDIV2 PTCON2.2

' CHOP Bits
$define CHOPbits_CHPCLKEN CHOP.15
$define CHOPbits_CHOPCLK0 CHOP.0
$define CHOPbits_CHOPCLK1 CHOP.1
$define CHOPbits_CHOPCLK2 CHOP.2
$define CHOPbits_CHOPCLK3 CHOP.3
$define CHOPbits_CHOPCLK4 CHOP.4
$define CHOPbits_CHOPCLK5 CHOP.5
$define CHOPbits_CHOPCLK6 CHOP.6
$define CHOPbits_CHOPCLK7 CHOP.7
$define CHOPbits_CHOPCLK8 CHOP.8
$define CHOPbits_CHOPCLK9 CHOP.9

' PWMCON1 Bits
$define PWMCON1bits_IUE PWMCON1.0
$define PWMCON1bits_XPRES PWMCON1.1
$define PWMCON1bits_CAM PWMCON1.2
$define PWMCON1bits_MTBS PWMCON1.3
$define PWMCON1bits_DTCP PWMCON1.5
$define PWMCON1bits_MDCS PWMCON1.8
$define PWMCON1bits_ITB PWMCON1.9
$define PWMCON1bits_TRGIEN PWMCON1.10
$define PWMCON1bits_CLIEN PWMCON1.11
$define PWMCON1bits_FLTIEN PWMCON1.12
$define PWMCON1bits_TRGSTAT PWMCON1.13
$define PWMCON1bits_CLSTAT PWMCON1.14
$define PWMCON1bits_FLTSTAT PWMCON1.15
$define PWMCON1bits_DTC0 PWMCON1.6
$define PWMCON1bits_DTC1 PWMCON1.7

' IOCON1 Bits
$define IOCON1bits_OSYNC IOCON1.0
$define IOCON1bits_SWAP IOCON1.1
$define IOCON1bits_OVRENL IOCON1.8
$define IOCON1bits_OVRENH IOCON1.9
$define IOCON1bits_POLL IOCON1.12
$define IOCON1bits_POLH IOCON1.13
$define IOCON1bits_PENL IOCON1.14
$define IOCON1bits_PENH IOCON1.15
$define IOCON1bits_CLDAT0 IOCON1.2
$define IOCON1bits_CLDAT1 IOCON1.3
$define IOCON1bits_FLTDAT0 IOCON1.4
$define IOCON1bits_FLTDAT1 IOCON1.5
$define IOCON1bits_OVRDAT0 IOCON1.6
$define IOCON1bits_OVRDAT1 IOCON1.7
$define IOCON1bits_PMOD0 IOCON1.10
$define IOCON1bits_PMOD1 IOCON1.11

' FCLCON1 Bits
$define FCLCON1bits_FLTPOL FCLCON1.2
$define FCLCON1bits_CLMOD FCLCON1.8
$define FCLCON1bits_CLPOL FCLCON1.9
$define FCLCON1bits_IFLTMOD FCLCON1.15
$define FCLCON1bits_FLTMOD0 FCLCON1.0
$define FCLCON1bits_FLTMOD1 FCLCON1.1
$define FCLCON1bits_FLTSRC0 FCLCON1.3
$define FCLCON1bits_FLTSRC1 FCLCON1.4
$define FCLCON1bits_FLTSRC2 FCLCON1.5
$define FCLCON1bits_FLTSRC3 FCLCON1.6
$define FCLCON1bits_FLTSRC4 FCLCON1.7
$define FCLCON1bits_CLSRC0 FCLCON1.10
$define FCLCON1bits_CLSRC1 FCLCON1.11
$define FCLCON1bits_CLSRC2 FCLCON1.12
$define FCLCON1bits_CLSRC3 FCLCON1.13
$define FCLCON1bits_CLSRC4 FCLCON1.14

' TRIG1 Bits
$define TRIG1bits_TRGCMP0 TRIG1.3
$define TRIG1bits_TRGCMP1 TRIG1.4
$define TRIG1bits_TRGCMP2 TRIG1.5
$define TRIG1bits_TRGCMP3 TRIG1.6
$define TRIG1bits_TRGCMP4 TRIG1.7
$define TRIG1bits_TRGCMP5 TRIG1.8
$define TRIG1bits_TRGCMP6 TRIG1.9
$define TRIG1bits_TRGCMP7 TRIG1.10
$define TRIG1bits_TRGCMP8 TRIG1.11
$define TRIG1bits_TRGCMP9 TRIG1.12
$define TRIG1bits_TRGCMP10 TRIG1.13
$define TRIG1bits_TRGCMP11 TRIG1.14
$define TRIG1bits_TRGCMP12 TRIG1.15

' TRGCON1 Bits
$define TRGCON1bits_DTM TRGCON1.7
$define TRGCON1bits_TRGSTRT0 TRGCON1.0
$define TRGCON1bits_TRGSTRT1 TRGCON1.1
$define TRGCON1bits_TRGSTRT2 TRGCON1.2
$define TRGCON1bits_TRGSTRT3 TRGCON1.3
$define TRGCON1bits_TRGSTRT4 TRGCON1.4
$define TRGCON1bits_TRGSTRT5 TRGCON1.5
$define TRGCON1bits_TRGDIV0 TRGCON1.12
$define TRGCON1bits_TRGDIV1 TRGCON1.13
$define TRGCON1bits_TRGDIV2 TRGCON1.14
$define TRGCON1bits_TRGDIV3 TRGCON1.15

' LEBCON1 Bits
$define LEBCON1bits_BPLL LEBCON1.0
$define LEBCON1bits_BPLH LEBCON1.1
$define LEBCON1bits_BPHL LEBCON1.2
$define LEBCON1bits_BPHH LEBCON1.3
$define LEBCON1bits_BCL_LEBCON1 LEBCON1.4
$define LEBCON1bits_BCH LEBCON1.5
$define LEBCON1bits_CLLEBEN LEBCON1.10
$define LEBCON1bits_FLTLEBEN LEBCON1.11
$define LEBCON1bits_PLF LEBCON1.12
$define LEBCON1bits_PLR LEBCON1.13
$define LEBCON1bits_PHF LEBCON1.14
$define LEBCON1bits_PHR LEBCON1.15

' LEBDLY1 Bits
$define LEBDLY1bits_LEB0 LEBDLY1.0
$define LEBDLY1bits_LEB1 LEBDLY1.1
$define LEBDLY1bits_LEB2 LEBDLY1.2
$define LEBDLY1bits_LEB3 LEBDLY1.3
$define LEBDLY1bits_LEB4 LEBDLY1.4
$define LEBDLY1bits_LEB5 LEBDLY1.5
$define LEBDLY1bits_LEB6 LEBDLY1.6
$define LEBDLY1bits_LEB7 LEBDLY1.7
$define LEBDLY1bits_LEB8 LEBDLY1.8
$define LEBDLY1bits_LEB9 LEBDLY1.9
$define LEBDLY1bits_LEB10 LEBDLY1.10
$define LEBDLY1bits_LEB11 LEBDLY1.11

' AUXCON1 Bits
$define AUXCON1bits_CHOPLEN AUXCON1.0
$define AUXCON1bits_CHOPHEN AUXCON1.1
$define AUXCON1bits_HRDDIS AUXCON1.14
$define AUXCON1bits_HRPDIS AUXCON1.15
$define AUXCON1bits_CHOPSEL0 AUXCON1.2
$define AUXCON1bits_CHOPSEL1 AUXCON1.3
$define AUXCON1bits_CHOPSEL2 AUXCON1.4
$define AUXCON1bits_CHOPSEL3 AUXCON1.5
$define AUXCON1bits_BLANKSEL0 AUXCON1.8
$define AUXCON1bits_BLANKSEL1 AUXCON1.9
$define AUXCON1bits_BLANKSEL2 AUXCON1.10
$define AUXCON1bits_BLANKSEL3 AUXCON1.11

' PWMCON2 Bits
$define PWMCON2bits_IUE PWMCON2.0
$define PWMCON2bits_XPRES PWMCON2.1
$define PWMCON2bits_CAM PWMCON2.2
$define PWMCON2bits_MTBS PWMCON2.3
$define PWMCON2bits_DTCP PWMCON2.5
$define PWMCON2bits_MDCS PWMCON2.8
$define PWMCON2bits_ITB PWMCON2.9
$define PWMCON2bits_TRGIEN PWMCON2.10
$define PWMCON2bits_CLIEN PWMCON2.11
$define PWMCON2bits_FLTIEN PWMCON2.12
$define PWMCON2bits_TRGSTAT PWMCON2.13
$define PWMCON2bits_CLSTAT PWMCON2.14
$define PWMCON2bits_FLTSTAT PWMCON2.15
$define PWMCON2bits_DTC0 PWMCON2.6
$define PWMCON2bits_DTC1 PWMCON2.7

' IOCON2 Bits
$define IOCON2bits_OSYNC IOCON2.0
$define IOCON2bits_SWAP IOCON2.1
$define IOCON2bits_OVRENL IOCON2.8
$define IOCON2bits_OVRENH IOCON2.9
$define IOCON2bits_POLL IOCON2.12
$define IOCON2bits_POLH IOCON2.13
$define IOCON2bits_PENL IOCON2.14
$define IOCON2bits_PENH IOCON2.15
$define IOCON2bits_CLDAT0 IOCON2.2
$define IOCON2bits_CLDAT1 IOCON2.3
$define IOCON2bits_FLTDAT0 IOCON2.4
$define IOCON2bits_FLTDAT1 IOCON2.5
$define IOCON2bits_OVRDAT0 IOCON2.6
$define IOCON2bits_OVRDAT1 IOCON2.7
$define IOCON2bits_PMOD0 IOCON2.10
$define IOCON2bits_PMOD1 IOCON2.11

' FCLCON2 Bits
$define FCLCON2bits_FLTPOL FCLCON2.2
$define FCLCON2bits_CLMOD FCLCON2.8
$define FCLCON2bits_CLPOL FCLCON2.9
$define FCLCON2bits_IFLTMOD FCLCON2.15
$define FCLCON2bits_FLTMOD0 FCLCON2.0
$define FCLCON2bits_FLTMOD1 FCLCON2.1
$define FCLCON2bits_FLTSRC0 FCLCON2.3
$define FCLCON2bits_FLTSRC1 FCLCON2.4
$define FCLCON2bits_FLTSRC2 FCLCON2.5
$define FCLCON2bits_FLTSRC3 FCLCON2.6
$define FCLCON2bits_FLTSRC4 FCLCON2.7
$define FCLCON2bits_CLSRC0 FCLCON2.10
$define FCLCON2bits_CLSRC1 FCLCON2.11
$define FCLCON2bits_CLSRC2 FCLCON2.12
$define FCLCON2bits_CLSRC3 FCLCON2.13
$define FCLCON2bits_CLSRC4 FCLCON2.14

' TRIG2 Bits
$define TRIG2bits_TRGCMP0 TRIG2.3
$define TRIG2bits_TRGCMP1 TRIG2.4
$define TRIG2bits_TRGCMP2 TRIG2.5
$define TRIG2bits_TRGCMP3 TRIG2.6
$define TRIG2bits_TRGCMP4 TRIG2.7
$define TRIG2bits_TRGCMP5 TRIG2.8
$define TRIG2bits_TRGCMP6 TRIG2.9
$define TRIG2bits_TRGCMP7 TRIG2.10
$define TRIG2bits_TRGCMP8 TRIG2.11
$define TRIG2bits_TRGCMP9 TRIG2.12
$define TRIG2bits_TRGCMP10 TRIG2.13
$define TRIG2bits_TRGCMP11 TRIG2.14
$define TRIG2bits_TRGCMP12 TRIG2.15

' TRGCON2 Bits
$define TRGCON2bits_DTM TRGCON2.7
$define TRGCON2bits_TRGSTRT0 TRGCON2.0
$define TRGCON2bits_TRGSTRT1 TRGCON2.1
$define TRGCON2bits_TRGSTRT2 TRGCON2.2
$define TRGCON2bits_TRGSTRT3 TRGCON2.3
$define TRGCON2bits_TRGSTRT4 TRGCON2.4
$define TRGCON2bits_TRGSTRT5 TRGCON2.5
$define TRGCON2bits_TRGDIV0 TRGCON2.12
$define TRGCON2bits_TRGDIV1 TRGCON2.13
$define TRGCON2bits_TRGDIV2 TRGCON2.14
$define TRGCON2bits_TRGDIV3 TRGCON2.15

' LEBCON2 Bits
$define LEBCON2bits_BPLL LEBCON2.0
$define LEBCON2bits_BPLH LEBCON2.1
$define LEBCON2bits_BPHL LEBCON2.2
$define LEBCON2bits_BPHH LEBCON2.3
$define LEBCON2bits_BCL_LEBCON2 LEBCON2.4
$define LEBCON2bits_BCH LEBCON2.5
$define LEBCON2bits_CLLEBEN LEBCON2.10
$define LEBCON2bits_FLTLEBEN LEBCON2.11
$define LEBCON2bits_PLF LEBCON2.12
$define LEBCON2bits_PLR LEBCON2.13
$define LEBCON2bits_PHF LEBCON2.14
$define LEBCON2bits_PHR LEBCON2.15

' LEBDLY2 Bits
$define LEBDLY2bits_LEB0 LEBDLY2.0
$define LEBDLY2bits_LEB1 LEBDLY2.1
$define LEBDLY2bits_LEB2 LEBDLY2.2
$define LEBDLY2bits_LEB3 LEBDLY2.3
$define LEBDLY2bits_LEB4 LEBDLY2.4
$define LEBDLY2bits_LEB5 LEBDLY2.5
$define LEBDLY2bits_LEB6 LEBDLY2.6
$define LEBDLY2bits_LEB7 LEBDLY2.7
$define LEBDLY2bits_LEB8 LEBDLY2.8
$define LEBDLY2bits_LEB9 LEBDLY2.9
$define LEBDLY2bits_LEB10 LEBDLY2.10
$define LEBDLY2bits_LEB11 LEBDLY2.11

' AUXCON2 Bits
$define AUXCON2bits_CHOPLEN AUXCON2.0
$define AUXCON2bits_CHOPHEN AUXCON2.1
$define AUXCON2bits_HRDDIS AUXCON2.14
$define AUXCON2bits_HRPDIS AUXCON2.15
$define AUXCON2bits_CHOPSEL0 AUXCON2.2
$define AUXCON2bits_CHOPSEL1 AUXCON2.3
$define AUXCON2bits_CHOPSEL2 AUXCON2.4
$define AUXCON2bits_CHOPSEL3 AUXCON2.5
$define AUXCON2bits_BLANKSEL0 AUXCON2.8
$define AUXCON2bits_BLANKSEL1 AUXCON2.9
$define AUXCON2bits_BLANKSEL2 AUXCON2.10
$define AUXCON2bits_BLANKSEL3 AUXCON2.11

' PWMCON3 Bits
$define PWMCON3bits_IUE PWMCON3.0
$define PWMCON3bits_XPRES PWMCON3.1
$define PWMCON3bits_CAM PWMCON3.2
$define PWMCON3bits_MTBS PWMCON3.3
$define PWMCON3bits_DTCP PWMCON3.5
$define PWMCON3bits_MDCS PWMCON3.8
$define PWMCON3bits_ITB PWMCON3.9
$define PWMCON3bits_TRGIEN PWMCON3.10
$define PWMCON3bits_CLIEN PWMCON3.11
$define PWMCON3bits_FLTIEN PWMCON3.12
$define PWMCON3bits_TRGSTAT PWMCON3.13
$define PWMCON3bits_CLSTAT PWMCON3.14
$define PWMCON3bits_FLTSTAT PWMCON3.15
$define PWMCON3bits_DTC0 PWMCON3.6
$define PWMCON3bits_DTC1 PWMCON3.7

' IOCON3 Bits
$define IOCON3bits_OSYNC IOCON3.0
$define IOCON3bits_SWAP IOCON3.1
$define IOCON3bits_OVRENL IOCON3.8
$define IOCON3bits_OVRENH IOCON3.9
$define IOCON3bits_POLL IOCON3.12
$define IOCON3bits_POLH IOCON3.13
$define IOCON3bits_PENL IOCON3.14
$define IOCON3bits_PENH IOCON3.15
$define IOCON3bits_CLDAT0 IOCON3.2
$define IOCON3bits_CLDAT1 IOCON3.3
$define IOCON3bits_FLTDAT0 IOCON3.4
$define IOCON3bits_FLTDAT1 IOCON3.5
$define IOCON3bits_OVRDAT0 IOCON3.6
$define IOCON3bits_OVRDAT1 IOCON3.7
$define IOCON3bits_PMOD0 IOCON3.10
$define IOCON3bits_PMOD1 IOCON3.11

' FCLCON3 Bits
$define FCLCON3bits_FLTPOL FCLCON3.2
$define FCLCON3bits_CLMOD FCLCON3.8
$define FCLCON3bits_CLPOL FCLCON3.9
$define FCLCON3bits_IFLTMOD FCLCON3.15
$define FCLCON3bits_FLTMOD0 FCLCON3.0
$define FCLCON3bits_FLTMOD1 FCLCON3.1
$define FCLCON3bits_FLTSRC0 FCLCON3.3
$define FCLCON3bits_FLTSRC1 FCLCON3.4
$define FCLCON3bits_FLTSRC2 FCLCON3.5
$define FCLCON3bits_FLTSRC3 FCLCON3.6
$define FCLCON3bits_FLTSRC4 FCLCON3.7
$define FCLCON3bits_CLSRC0 FCLCON3.10
$define FCLCON3bits_CLSRC1 FCLCON3.11
$define FCLCON3bits_CLSRC2 FCLCON3.12
$define FCLCON3bits_CLSRC3 FCLCON3.13
$define FCLCON3bits_CLSRC4 FCLCON3.14

' TRIG3 Bits
$define TRIG3bits_TRGCMP0 TRIG3.3
$define TRIG3bits_TRGCMP1 TRIG3.4
$define TRIG3bits_TRGCMP2 TRIG3.5
$define TRIG3bits_TRGCMP3 TRIG3.6
$define TRIG3bits_TRGCMP4 TRIG3.7
$define TRIG3bits_TRGCMP5 TRIG3.8
$define TRIG3bits_TRGCMP6 TRIG3.9
$define TRIG3bits_TRGCMP7 TRIG3.10
$define TRIG3bits_TRGCMP8 TRIG3.11
$define TRIG3bits_TRGCMP9 TRIG3.12
$define TRIG3bits_TRGCMP10 TRIG3.13
$define TRIG3bits_TRGCMP11 TRIG3.14
$define TRIG3bits_TRGCMP12 TRIG3.15

' TRGCON3 Bits
$define TRGCON3bits_DTM TRGCON3.7
$define TRGCON3bits_TRGSTRT0 TRGCON3.0
$define TRGCON3bits_TRGSTRT1 TRGCON3.1
$define TRGCON3bits_TRGSTRT2 TRGCON3.2
$define TRGCON3bits_TRGSTRT3 TRGCON3.3
$define TRGCON3bits_TRGSTRT4 TRGCON3.4
$define TRGCON3bits_TRGSTRT5 TRGCON3.5
$define TRGCON3bits_TRGDIV0 TRGCON3.12
$define TRGCON3bits_TRGDIV1 TRGCON3.13
$define TRGCON3bits_TRGDIV2 TRGCON3.14
$define TRGCON3bits_TRGDIV3 TRGCON3.15

' LEBCON3 Bits
$define LEBCON3bits_BPLL LEBCON3.0
$define LEBCON3bits_BPLH LEBCON3.1
$define LEBCON3bits_BPHL LEBCON3.2
$define LEBCON3bits_BPHH LEBCON3.3
$define LEBCON3bits_BCL_LEBCON3 LEBCON3.4
$define LEBCON3bits_BCH LEBCON3.5
$define LEBCON3bits_CLLEBEN LEBCON3.10
$define LEBCON3bits_FLTLEBEN LEBCON3.11
$define LEBCON3bits_PLF LEBCON3.12
$define LEBCON3bits_PLR LEBCON3.13
$define LEBCON3bits_PHF LEBCON3.14
$define LEBCON3bits_PHR LEBCON3.15

' LEBDLY3 Bits
$define LEBDLY3bits_LEB0 LEBDLY3.0
$define LEBDLY3bits_LEB1 LEBDLY3.1
$define LEBDLY3bits_LEB2 LEBDLY3.2
$define LEBDLY3bits_LEB3 LEBDLY3.3
$define LEBDLY3bits_LEB4 LEBDLY3.4
$define LEBDLY3bits_LEB5 LEBDLY3.5
$define LEBDLY3bits_LEB6 LEBDLY3.6
$define LEBDLY3bits_LEB7 LEBDLY3.7
$define LEBDLY3bits_LEB8 LEBDLY3.8
$define LEBDLY3bits_LEB9 LEBDLY3.9
$define LEBDLY3bits_LEB10 LEBDLY3.10
$define LEBDLY3bits_LEB11 LEBDLY3.11

' AUXCON3 Bits
$define AUXCON3bits_CHOPLEN AUXCON3.0
$define AUXCON3bits_CHOPHEN AUXCON3.1
$define AUXCON3bits_HRDDIS AUXCON3.14
$define AUXCON3bits_HRPDIS AUXCON3.15
$define AUXCON3bits_CHOPSEL0 AUXCON3.2
$define AUXCON3bits_CHOPSEL1 AUXCON3.3
$define AUXCON3bits_CHOPSEL2 AUXCON3.4
$define AUXCON3bits_CHOPSEL3 AUXCON3.5
$define AUXCON3bits_BLANKSEL0 AUXCON3.8
$define AUXCON3bits_BLANKSEL1 AUXCON3.9
$define AUXCON3bits_BLANKSEL2 AUXCON3.10
$define AUXCON3bits_BLANKSEL3 AUXCON3.11

' TRISA Bits
$define TRISAbits_TRISA0 TRISA.0
$define TRISAbits_TRISA1 TRISA.1
$define TRISAbits_TRISA2 TRISA.2
$define TRISAbits_TRISA3 TRISA.3
$define TRISAbits_TRISA4 TRISA.4

' PORTA Bits
$define PORTAbits_RA0 PORTA.0
$define PORTAbits_RA1 PORTA.1
$define PORTAbits_RA2 PORTA.2
$define PORTAbits_RA3 PORTA.3
$define PORTAbits_RA4 PORTA.4

' LATA Bits
$define LATAbits_LATA0 LATA.0
$define LATAbits_LATA1 LATA.1
$define LATAbits_LATA2 LATA.2
$define LATAbits_LATA3 LATA.3
$define LATAbits_LATA4 LATA.4

' ODCA Bits
$define ODCAbits_ODCA0 ODCA.0
$define ODCAbits_ODCA1 ODCA.1
$define ODCAbits_ODCA2 ODCA.2
$define ODCAbits_ODCA3 ODCA.3
$define ODCAbits_ODCA4 ODCA.4

' CNENA Bits
$define CNENAbits_CNIEA0 CNENA.0
$define CNENAbits_CNIEA1 CNENA.1
$define CNENAbits_CNIEA2 CNENA.2
$define CNENAbits_CNIEA3 CNENA.3
$define CNENAbits_CNIEA4 CNENA.4

' CNPUA Bits
$define CNPUAbits_CNPUA0 CNPUA.0
$define CNPUAbits_CNPUA1 CNPUA.1
$define CNPUAbits_CNPUA2 CNPUA.2
$define CNPUAbits_CNPUA3 CNPUA.3
$define CNPUAbits_CNPUA4 CNPUA.4

' CNPDA Bits
$define CNPDAbits_CNPDA0 CNPDA.0
$define CNPDAbits_CNPDA1 CNPDA.1
$define CNPDAbits_CNPDA2 CNPDA.2
$define CNPDAbits_CNPDA3 CNPDA.3
$define CNPDAbits_CNPDA4 CNPDA.4

' ANSELA Bits
$define ANSELAbits_ANSA0 ANSELA.0
$define ANSELAbits_ANSA1 ANSELA.1
$define ANSELAbits_ANSA4 ANSELA.4

' TRISB Bits
$define TRISBbits_TRISB0 TRISB.0
$define TRISBbits_TRISB1 TRISB.1
$define TRISBbits_TRISB2 TRISB.2
$define TRISBbits_TRISB3 TRISB.3
$define TRISBbits_TRISB4 TRISB.4
$define TRISBbits_TRISB5 TRISB.5
$define TRISBbits_TRISB6 TRISB.6
$define TRISBbits_TRISB7 TRISB.7
$define TRISBbits_TRISB8 TRISB.8
$define TRISBbits_TRISB9 TRISB.9
$define TRISBbits_TRISB10 TRISB.10
$define TRISBbits_TRISB11 TRISB.11
$define TRISBbits_TRISB12 TRISB.12
$define TRISBbits_TRISB13 TRISB.13
$define TRISBbits_TRISB14 TRISB.14
$define TRISBbits_TRISB15 TRISB.15

' PORTB Bits
$define PORTBbits_RB0 PORTB.0
$define PORTBbits_RB1 PORTB.1
$define PORTBbits_RB2 PORTB.2
$define PORTBbits_RB3 PORTB.3
$define PORTBbits_RB4 PORTB.4
$define PORTBbits_RB5 PORTB.5
$define PORTBbits_RB6 PORTB.6
$define PORTBbits_RB7 PORTB.7
$define PORTBbits_RB8 PORTB.8
$define PORTBbits_RB9 PORTB.9
$define PORTBbits_RB10 PORTB.10
$define PORTBbits_RB11 PORTB.11
$define PORTBbits_RB12 PORTB.12
$define PORTBbits_RB13 PORTB.13
$define PORTBbits_RB14 PORTB.14
$define PORTBbits_RB15 PORTB.15

' LATB Bits
$define LATBbits_LATB0 LATB.0
$define LATBbits_LATB1 LATB.1
$define LATBbits_LATB2 LATB.2
$define LATBbits_LATB3 LATB.3
$define LATBbits_LATB4 LATB.4
$define LATBbits_LATB5 LATB.5
$define LATBbits_LATB6 LATB.6
$define LATBbits_LATB7 LATB.7
$define LATBbits_LATB8 LATB.8
$define LATBbits_LATB9 LATB.9
$define LATBbits_LATB10 LATB.10
$define LATBbits_LATB11 LATB.11
$define LATBbits_LATB12 LATB.12
$define LATBbits_LATB13 LATB.13
$define LATBbits_LATB14 LATB.14
$define LATBbits_LATB15 LATB.15

' ODCB Bits
$define ODCBbits_ODCB0 ODCB.0
$define ODCBbits_ODCB1 ODCB.1
$define ODCBbits_ODCB2 ODCB.2
$define ODCBbits_ODCB3 ODCB.3
$define ODCBbits_ODCB4 ODCB.4
$define ODCBbits_ODCB5 ODCB.5
$define ODCBbits_ODCB6 ODCB.6
$define ODCBbits_ODCB7 ODCB.7
$define ODCBbits_ODCB8 ODCB.8
$define ODCBbits_ODCB9 ODCB.9
$define ODCBbits_ODCB10 ODCB.10
$define ODCBbits_ODCB11 ODCB.11
$define ODCBbits_ODCB12 ODCB.12
$define ODCBbits_ODCB13 ODCB.13
$define ODCBbits_ODCB14 ODCB.14
$define ODCBbits_ODCB15 ODCB.15

' CNENB Bits
$define CNENBbits_CNIEB0 CNENB.0
$define CNENBbits_CNIEB1 CNENB.1
$define CNENBbits_CNIEB2 CNENB.2
$define CNENBbits_CNIEB3 CNENB.3
$define CNENBbits_CNIEB4 CNENB.4
$define CNENBbits_CNIEB5 CNENB.5
$define CNENBbits_CNIEB6 CNENB.6
$define CNENBbits_CNIEB7 CNENB.7
$define CNENBbits_CNIEB8 CNENB.8
$define CNENBbits_CNIEB9 CNENB.9
$define CNENBbits_CNIEB10 CNENB.10
$define CNENBbits_CNIEB11 CNENB.11
$define CNENBbits_CNIEB12 CNENB.12
$define CNENBbits_CNIEB13 CNENB.13
$define CNENBbits_CNIEB14 CNENB.14
$define CNENBbits_CNIEB15 CNENB.15

' CNPUB Bits
$define CNPUBbits_CNPUB0 CNPUB.0
$define CNPUBbits_CNPUB1 CNPUB.1
$define CNPUBbits_CNPUB2 CNPUB.2
$define CNPUBbits_CNPUB3 CNPUB.3
$define CNPUBbits_CNPUB4 CNPUB.4
$define CNPUBbits_CNPUB5 CNPUB.5
$define CNPUBbits_CNPUB6 CNPUB.6
$define CNPUBbits_CNPUB7 CNPUB.7
$define CNPUBbits_CNPUB8 CNPUB.8
$define CNPUBbits_CNPUB9 CNPUB.9
$define CNPUBbits_CNPUB10 CNPUB.10
$define CNPUBbits_CNPUB11 CNPUB.11
$define CNPUBbits_CNPUB12 CNPUB.12
$define CNPUBbits_CNPUB13 CNPUB.13
$define CNPUBbits_CNPUB14 CNPUB.14
$define CNPUBbits_CNPUB15 CNPUB.15

' CNPDB Bits
$define CNPDBbits_CNPDB0 CNPDB.0
$define CNPDBbits_CNPDB1 CNPDB.1
$define CNPDBbits_CNPDB2 CNPDB.2
$define CNPDBbits_CNPDB3 CNPDB.3
$define CNPDBbits_CNPDB4 CNPDB.4
$define CNPDBbits_CNPDB5 CNPDB.5
$define CNPDBbits_CNPDB6 CNPDB.6
$define CNPDBbits_CNPDB7 CNPDB.7
$define CNPDBbits_CNPDB8 CNPDB.8
$define CNPDBbits_CNPDB9 CNPDB.9
$define CNPDBbits_CNPDB10 CNPDB.10
$define CNPDBbits_CNPDB11 CNPDB.11
$define CNPDBbits_CNPDB12 CNPDB.12
$define CNPDBbits_CNPDB13 CNPDB.13
$define CNPDBbits_CNPDB14 CNPDB.14
$define CNPDBbits_CNPDB15 CNPDB.15

' ANSELB Bits
$define ANSELBbits_ANSB0 ANSELB.0
$define ANSELBbits_ANSB1 ANSELB.1
$define ANSELBbits_ANSB2 ANSELB.2
$define ANSELBbits_ANSB3 ANSELB.3
$define ANSELBbits_ANSB8 ANSELB.8

' APPS Bits
$define APPSbits_APIFUL APPS.0
$define APPSbits_APIOV APPS.1
$define APPSbits_AROFUL APPS.2
$define APPSbits_APOOV APPS.3
$define APPSbits_STRFUL APPS.4
'
' Interrupt Vector values
'
$define OscillatorFail 0
$define AddressError 1
$define HardTrapError 2
$define StackError 3
$define MathError 4
$define DMACError 5
$define SoftTrapError 6
$define ReservedTrap7 7
$define INT0Interrupt 8
$define IC1Interrupt 9
$define OC1Interrupt 10
$define T1Interrupt 11
$define DMA0Interrupt 12
$define IC2Interrupt 13
$define OC2Interrupt 14
$define T2Interrupt 15
$define T3Interrupt 16
$define SPI1ErrInterrupt 17
$define SPI1Interrupt 18
$define U1RXInterrupt 19
$define U1TXInterrupt 20
$define AD1Interrupt 21
$define DMA1Interrupt 22
$define Interrupt15 23
$define SI2C1Interrupt 24
$define MI2C1Interrupt 25
$define CM1Interrupt 26
$define CNInterrupt 27
$define INT1Interrupt 28
$define Interrupt21 29
$define Interrupt22 30
$define Interrupt23 31
$define DMA2Interrupt 32
$define OC3Interrupt 33
$define OC4Interrupt 34
$define T4Interrupt 35
$define T5Interrupt 36
$define INT2Interrupt 37
$define U2RXInterrupt 38
$define U2TXInterrupt 39
$define SPI2ErrInterrupt 40
$define SPI2Interrupt 41
$define Interrupt34 42
$define Interrupt35 43
$define DMA3Interrupt 44
$define IC3Interrupt 45
$define IC4Interrupt 46
$define Interrupt39 47
$define Interrupt40 48
$define Interrupt41 49
$define Interrupt42 50
$define Interrupt43 51
$define Interrupt44 52
$define Interrupt45 53
$define Interrupt46 54
$define Interrupt47 55
$define Interrupt48 56
$define SI2C2Interrupt 57
$define MI2C2Interrupt 58
$define Interrupt51 59
$define Interrupt52 60
$define Interrupt53 61
$define Interrupt54 62
$define Interrupt55 63
$define Interrupt56 64
$define PWMSpEventMatchInterrupt 65
$define QEI1Interrupt 66
$define Interrupt59 67
$define Interrupt60 68
$define Interrupt61 69
$define Interrupt62 70
$define Interrupt63 71
$define Interrupt64 72
$define U1ErrInterrupt 73
$define U2ErrInterrupt 74
$define CRCInterrupt 75
$define Interrupt68 76
$define Interrupt69 77
$define Interrupt70 78
$define Interrupt71 79
$define Interrupt72 80
$define Interrupt73 81
$define Interrupt74 82
$define Interrupt75 83
$define Interrupt76 84
$define CTMUInterrupt 85
$define Interrupt78 86
$define Interrupt79 87
$define Interrupt80 88
$define Interrupt81 89
$define Interrupt82 90
$define Interrupt83 91
$define Interrupt84 92
$define Interrupt85 93
$define Interrupt86 94
$define Interrupt87 95
$define Interrupt88 96
$define Interrupt89 97
$define Interrupt90 98
$define Interrupt91 99
$define Interrupt92 100
$define Interrupt93 101
$define PWM1Interrupt 102
$define PWM2Interrupt 103
$define PWM3Interrupt 104
$define Interrupt97 105
$define Interrupt98 106
$define Interrupt99 107
$define Interrupt100 108
$define Interrupt101 109
$define Interrupt102 110
$define Interrupt103 111
$define Interrupt104 112
$define Interrupt105 113
$define Interrupt106 114
$define Interrupt107 115
$define Interrupt108 116
$define Interrupt109 117
$define Interrupt110 118
$define Interrupt111 119
$define Interrupt112 120
$define Interrupt113 121
$define Interrupt114 122
$define Interrupt115 123
$define Interrupt116 124
$define Interrupt117 125
$define Interrupt118 126
$define Interrupt119 127
$define Interrupt120 128
$define Interrupt121 129
$define Interrupt122 130
$define Interrupt123 131
$define Interrupt124 132
$define Interrupt125 133
$define Interrupt126 134
$define Interrupt127 135
$define Interrupt128 136
$define Interrupt129 137
$define Interrupt130 138
$define Interrupt131 139
$define Interrupt132 140
$define Interrupt133 141
$define Interrupt134 142
$define Interrupt135 143
$define Interrupt136 144
$define Interrupt137 145
$define Interrupt138 146
$define Interrupt139 147
$define Interrupt140 148
$define Interrupt141 149
$define ICDInterrupt 150
$define JTAGInterrupt 151
$define Interrupt144 152
$define PTGSTEPInterrupt 153
$define PTGWDTInterrupt 154
$define PTG0Interrupt 155
$define PTG1Interrupt 156
$define PTG2Interrupt 157
$define PTG3Interrupt 158
'
'[PPS Defs Start]----------------------------------------------------------------------
'
'[Remappable Peripheral Inputs]
'
$define cIn_Pin_VSS 0                       ' Assign VSS as Input Pin
$define cIn_Pin_C1OUT 1                     ' Assign C1OUT as Input Pin
$define cIn_Pin_C2OUT 2                     ' Assign C2OUT as Input Pin
$define cIn_Pin_C3OUT 3                     ' Assign C3OUT as Input Pin
$define cIn_Pin_C4OUT 4                     ' Assign C4OUT as Input Pin
$define cIn_Pin_PTGO30 6                    ' Assign PTGO30 as Input Pin
$define cIn_Pin_PTGO31 7                    ' Assign PTGO31 as Input Pin
$define cIn_Pin_FINDX1 8                    ' Assign FINDX1 as Input Pin
$define cIn_Pin_FHOME1 9                    ' Assign FHOME1 as Input Pin
$define cIn_Pin_FINDX2 10                   ' Assign FINDX2 as Input Pin
$define cIn_Pin_FHOME2 11                   ' Assign FHOME2 as Input Pin
$define cIn_Pin_RPI24 24                    ' Assign RPI24 as Input Pin
$define cIn_Pin_RPI25 25                    ' Assign RPI25 as Input Pin
$define cIn_Pin_RPI27 27                    ' Assign RPI27 as Input Pin
$define cIn_Pin_RPI28 28                    ' Assign RPI28 as Input Pin
$define cIn_Pin_RP30 30                     ' Assign RP30 as Input Pin
$define cIn_Pin_RP31 31                     ' Assign RP31 as Input Pin
$define cIn_Pin_RPI32 32                    ' Assign RPI32 as Input Pin
$define cIn_Pin_RPI33 33                    ' Assign RPI33 as Input Pin
$define cIn_Pin_RPI34 34                    ' Assign RPI34 as Input Pin
$define cIn_Pin_RP35 35                     ' Assign RP35 as Input Pin
$define cIn_Pin_RP36 36                     ' Assign RP36 as Input Pin
$define cIn_Pin_RP37 37                     ' Assign RP37 as Input Pin
$define cIn_Pin_RP38 38                     ' Assign RP38 as Input Pin
$define cIn_Pin_RP39 39                     ' Assign RP39 as Input Pin
$define cIn_Pin_RP40 40                     ' Assign RP40 as Input Pin
$define cIn_Pin_RP41 41                     ' Assign RP41 as Input Pin
$define cIn_Pin_RP42 42                     ' Assign RP42 as Input Pin
$define cIn_Pin_RP43 43                     ' Assign RP43 as Input Pin
$define cIn_Pin_RPI44 44                    ' Assign RPI44 as Input Pin
$define cIn_Pin_RPI45 45                    ' Assign RPI45 as Input Pin
$define cIn_Pin_RPI46 46                    ' Assign RPI46 as Input Pin
$define cIn_Pin_RPI47 47                    ' Assign RPI47 as Input Pin
$define cIn_Pin_RP49 49                     ' Assign RP49 as Input Pin
$define cIn_Pin_RP50 50                     ' Assign RP50 as Input Pin
$define cIn_Pin_RPI51 51                    ' Assign RPI51 as Input Pin
$define cIn_Pin_RPI52 52                    ' Assign RPI52 as Input Pin
$define cIn_Pin_RPI53 53                    ' Assign RPI53 as Input Pin
$define cIn_Pin_RP54 54                     ' Assign RP54 as Input Pin
$define cIn_Pin_RP55 55                     ' Assign RP55 as Input Pin
$define cIn_Pin_RP56 56                     ' Assign RP56 as Input Pin
$define cIn_Pin_RP57 57                     ' Assign RP57 as Input Pin
$define cIn_Pin_RPI58 58                    ' Assign RPI58 as Input Pin
$define cIn_Pin_RP60 60                     ' Assign RP60 as Input Pin
$define cIn_Pin_RP61 61                     ' Assign RP61 as Input Pin
$define cIn_Pin_RP62 62                     ' Assign RP62 as Input Pin
$define cIn_Pin_RP63 63                     ' Assign RP63 as Input Pin
$define cIn_Pin_RP64 64                     ' Assign RP64 as Input Pin
$define cIn_Pin_RP65 65                     ' Assign RP65 as Input Pin
$define cIn_Pin_RP67 67                     ' Assign RP67 as Input Pin
$define cIn_Pin_RP68 68                     ' Assign RP68 as Input Pin
$define cIn_Pin_RP69 69                     ' Assign RP69 as Input Pin
$define cIn_Pin_RP70 70                     ' Assign RP70 as Input Pin
$define cIn_Pin_RP71 71                     ' Assign RP71 as Input Pin
$define cIn_Pin_RP72 72                     ' Assign RP72 as Input Pin
$define cIn_Pin_RP73 73                     ' Assign RP73 as Input Pin
$define cIn_Pin_RP74 74                     ' Assign RP74 as Input Pin
$define cIn_Pin_RP75 75                     ' Assign RP75 as Input Pin
$define cIn_Pin_RP76 76                     ' Assign RP76 as Input Pin
$define cIn_Pin_RP77 77                     ' Assign RP77 as Input Pin
$define cIn_Pin_RP78 78                     ' Assign RP78 as Input Pin
$define cIn_Pin_RP79 79                     ' Assign RP79 as Input Pin
$define cIn_Pin_RP80 80                     ' Assign RP80 as Input Pin
$define cIn_Pin_RP81 81                     ' Assign RP81 as Input Pin
$define cIn_Pin_RP82 82                     ' Assign RP82 as Input Pin
$define cIn_Pin_RP83 83                     ' Assign RP83 as Input Pin
$define cIn_Pin_RP84 84                     ' Assign RP84 as Input Pin
$define cIn_Pin_RP85 85                     ' Assign RP85 as Input Pin
$define cIn_Pin_RP86 86                     ' Assign RP86 as Input Pin
$define cIn_Pin_RP87 87                     ' Assign RP87 as Input Pin
$define cIn_Pin_RP88 88                     ' Assign RP88 as Input Pin
$define cIn_Pin_RP89 89                     ' Assign RP89 as Input Pin
$define cIn_Pin_RPI94 94                    ' Assign RPI94 as Input Pin
$define cIn_Pin_RPI95 95                    ' Assign RPI95 as Input Pin
$define cIn_Pin_RPI96 96                    ' Assign RPI96 as Input Pin
$define cIn_Pin_RP97 97                     ' Assign RP97 as Input Pin
$define cIn_Pin_RP98 98                     ' Assign RP98 as Input Pin
$define cIn_Pin_RP99 99                     ' Assign RP99 as Input Pin
$define cIn_Pin_RP100 100                   ' Assign RP100 as Input Pin
$define cIn_Pin_RP101 101                   ' Assign RP101 as Input Pin
$define cIn_Pin_RP104 104                   ' Assign RP104 as Input Pin
$define cIn_Pin_RP108 108                   ' Assign RP108 as Input Pin
$define cIn_Pin_RP109 109                   ' Assign RP109 as Input Pin
$define cIn_Pin_RP110 110                   ' Assign RP110 as Input Pin
$define cIn_Pin_RP111 111                   ' Assign RP111 as Input Pin
$define cIn_Pin_RP112 112                   ' Assign RP112 as Input Pin
$define cIn_Pin_RP113 113                   ' Assign RP113 as Input Pin
$define cIn_Pin_RP118 118                   ' Assign RP118 as Input Pin
$define cIn_Pin_RPI119 119                  ' Assign RPI119 as Input Pin
$define cIn_Pin_RP120 120                   ' Assign RP120 as Input Pin
$define cIn_Pin_RPI121 121                  ' Assign RPI121 as Input Pin
$define cIn_Pin_RP124 124                   ' Assign RP124 as Input Pin
$define cIn_Pin_RP125 125                   ' Assign RP125 as Input Pin
$define cIn_Pin_RP126 126                   ' Assign RP126 as Input Pin
$define cIn_Pin_RP127 127                   ' Assign RP127 as Input Pin
$define cIn_Pin_RP16 16                         ' Assign RP16 as Input Pin
$define cIn_Pin_RP17 17                         ' Assign RP17 as Input Pin
$define cIn_Pin_RP18 18                         ' Assign RP18 as Input Pin
$define cIn_Pin_RP19 19                         ' Assign RP19 as Input Pin
$define cIn_Pin_RP20 20                         ' Assign RP20 as Input Pin
$define cIn_Pin_RP21 21                         ' Assign RP21 as Input Pin
$define cIn_Pin_RP22 22                         ' Assign RP22 as Input Pin
$define cIn_Pin_RP23 23                         ' Assign RP23 as Input Pin

$define cIn_Fn_INT1  RPINR0bits_INT1R            ' Assign External Interrupt 1 (INTR1) to the corresponding RPn Pin
$define cIn_Fn_INT2  RPINR1bits_INT2R            ' Assign External Interrupt 2 (INTR2) to the corresponding RPn Pin
$define cIn_Fn_INT3  RPINR1bits_INT3R        ' Assign External Interrupt 3 (INTR3) to the corresponding RPn Pin
$define cIn_Fn_INT4  RPINR2bits_INT4R        ' Assign External Interrupt 4 (INTR4) to the corresponding RPn Pin
$define cIn_Fn_T6CK  RPINR5bits_T6CKR        ' Assign Timer6 External Clock (T6CK) to the corresponding RPn Pin
$define cIn_Fn_T7CK  RPINR5bits_T7CKR        ' Assign Timer7 External Clock (T7CK) to the corresponding RPn Pin
$define cIn_Fn_T8CK  RPINR6bits_T8CKR        ' Assign Timer8 External Clock (T8CK) to the corresponding RPn Pin
$define cIn_Fn_T9CK  RPINR6bits_T9CKR        ' Assign Timer9 External Clock (T9CK) to the corresponding RPn Pin
$define cIn_Fn_IC3  RPINR8bits_IC3R          ' Assign Input Capture 3 (IC4) to the corresponding RPn Pin
$define cIn_Fn_IC4  RPINR8bits_IC4R          ' Assign Input Capture 4 (IC4) to the corresponding RPn Pin
$define cIn_Fn_SDI1  RPINR20bits_SDI1R       ' Assign SPI1 Data Input (SDI1) to the corresponding RPn Pin
$define cIn_Fn_SCK1  RPINR20bits_SCK1R       ' Assign SPI1 Clock Input (SCK1IN) to the corresponding RPn Pin
$define cIn_Fn_SS1  RPINR21bits_SS1R         ' Assign SPI1 Slave Select Input (SS1IN) to the corresponding RPn Pin
$define cIn_Fn_SDI2  RPINR22bits_SDI2R       ' Assign SPI2 Data Input (SDI2) to the corresponding RPn Pin
$define cIn_Fn_SCK2  RPINR22bits_SCK2R       ' Assign SPI2 Clock Input (SCK2IN) to the corresponding RPn Pin
$define cIn_Fn_SS2  RPINR23bits_SS2R         ' Assign SPI2 Slave Select Input (SS2IN) to the corresponding RPn Pin
$define cIn_Fn_OCFB  RPINR11bits_OCFBR       ' Assign Output Capture B (OCFB) to the corresponding RPn Pin
$define cIn_Fn_FLT1  RPINR12bits_FLT1R       ' Assign PWM1 Fault (FLT1) to the corresponding RPn Pin
$define cIn_Fn_FLT2  RPINR12bits_FLT2R       ' Assign PWM2 Fault (FLT2) to the corresponding RPn Pin
$define cIn_Fn_FLT3  RPINR13bits_FLT3R       ' Assign PWM3 Fault (FLT3) to the corresponding RPn Pin
$define cIn_Fn_FLT4  RPINR13bits_FLT4R       ' Assign PWM4 Fault (FLT4) to the corresponding RPn Pin
$define cIn_Fn_QEH1  RPINR15bits_HOME1R      ' Assign QEI HOME to the corresponding RPn Pin
$define cIn_Fn_QEH2  RPINR17bits_HOME2R      ' Assign QEI HOME to the corresponding RPn Pin
$define cIn_Fn_C2RX  RPINR26bits_C2RXR       ' Assign ECAN2  Receive Input (C2RX) to the corresponding RPn Pin
$define cIn_Fn_U3RX  RPINR27bits_U3RXR       ' Assign UART3  Receive (U3RX) to the corresponding RPn Pin
$define cIn_Fn_U3CTS  RPINR27bits_U3CTSR     ' Assign UART3 Clear to Send (U3CTS) to the corresponding RPn Pin
$define cIn_Fn_U4RX  RPINR28bits_U4RXR       ' Assign UART4  Receive (U4RX) to the corresponding RPn Pin
$define cIn_Fn_U4CTS  RPINR28bits_U4CTSR     ' Assign UART4 Clear to Send (U4CTS) to the corresponding RPn Pin
$define cIn_Fn_SDI3  RPINR29bits_SDI3R       ' Assign SPI3 Data Input (SDI3) to the corresponding RPn Pin
$define cIn_Fn_SCK3  RPINR29bits_SCK3R       ' Assign SPI3 Clock Input (SCK3IN) to the corresponding RPn Pin
$define cIn_Fn_SS3  RPINR30bits_SS3R         ' Assign SPI3 Slave Select Input (SS3IN) to the corresponding RPn Pin
$define cIn_Fn_SDI4  RPINR31bits_SDI4R       ' Assign SPI4 Data Input (SDI4) to the corresponding RPn Pin
$define cIn_Fn_SCK4  RPINR31bits_SCK4R       ' Assign SPI4 Clock Input (SCK4IN) to the corresponding RPn Pin
$define cIn_Fn_SS4  RPINR32bits_SS4R         ' Assign SPI4 Slave Select Input (SS4IN) to the corresponding RPn Pin
$define cIn_Fn_IC9  RPINR33bits_IC9R         ' Assign Input Capture 9 (IC9) to the corresponding RPn Pin
$define cIn_Fn_IC10  RPINR33bits_IC10R       ' Assign Input Capture 10 (IC10) to the corresponding RPn Pin
$define cIn_Fn_IC11  RPINR34bits_IC11R       ' Assign Input Capture 11 (IC11) to the corresponding RPn Pin
$define cIn_Fn_IC12  RPINR34bits_IC12R       ' Assign Input Capture 12 (IC12) to the corresponding RPn Pin
$define cIn_Fn_IC13  RPINR35bits_IC13R       ' Assign Input Capture 13 (IC13) to the corresponding RPn Pin
$define cIn_Fn_IC14  RPINR35bits_IC14R       ' Assign Input Capture 14 (IC14) to the corresponding RPn Pin
$define cIn_Fn_IC15  RPINR36bits_IC15R       ' Assign Input Capture 15 (IC15) to the corresponding RPn Pin
$define cIn_Fn_IC16  RPINR36bits_IC16R       ' Assign Input Capture 16 (IC16) to the corresponding RPn Pin
$define cIn_Fn_OCFC  RPINR37bits_OCFCR       ' Assign Output Capture C (OCFC) to the corresponding RPn Pin
$define cIn_Fn_SYNCI1  RPINR37bits_SYNCI1R   ' Assign PWM Sync Input 1 (SYNCI1) to the corresponding RPn Pin
$define cIn_Fn_SYNCI2  RPINR38bits_SYNCI2R   ' Assign PWM Sync Input 2 (SYNCI2) to the corresponding RPn Pin
$define cIn_Fn_DTCMP1  RPINR38bits_DTCMP1R   ' Assign PWM Dead Time Compensation 1 (DTCMP1) to the corresponding RPn Pin
$define cIn_Fn_DTCMP2  RPINR39bits_DTCMP2R   ' Assign PWM Dead Time Compensation 2 (DTCMP2) to the corresponding RPn Pin
$define cIn_Fn_DTCMP3  RPINR39bits_DTCMP3R   ' Assign PWM Dead Time Compensation 3 (DTCMP3) to the corresponding RPn Pin
$define cIn_Fn_DTCMP4  RPINR40bits_DTCMP4R   ' Assign PWM Dead Time Compensation 4 (DTCMP4) to the corresponding RPn Pin
$define cIn_Fn_DTCMP5  RPINR40bits_DTCMP5R   ' Assign PWM Dead Time Compensation 5 (DTCMP5) to the corresponding RPn Pin
$define cIn_Fn_DTCMP6  RPINR41bits_DTCMP6R   ' Assign PWM Dead Time Compensation 6 (DTCMP6) to the corresponding RPn Pin
$define cIn_Fn_DTCMP7  RPINR41bits_DTCMP7R   ' Assign PWM Dead Time Compensation 7 (DTCMP7) to the corresponding RPn Pin
$define cIn_Fn_FLT5  RPINR42bits_FLT5R       ' Assign PWM5 Fault (FLT5) to the corresponding RPn Pin
$define cIn_Fn_FLT6  RPINR42bits_FLT6R       ' Assign PWM6 Fault (FLT6) to the corresponding RPn Pin
$define cIn_Fn_FLT7  RPINR43bits_FLT7R       ' Assign PWM7 Fault (FLT7) to the corresponding RPn Pin
$define cIn_Fn_T2CK  RPINR3bits_T2CKR            ' Assign Timer2 External Clock (T2CK) to the corresponding RPn Pin
$define cIn_Fn_T3CK  RPINR3bits_T3CKR            ' Assign Timer3 External Clock (T3CK) to the corresponding RPn Pin
$define cIn_Fn_T4CK  RPINR4bits_T4CKR            ' Assign Timer4 External Clock (T4CK) to the corresponding RPn Pin
$define cIn_Fn_T5CK  RPINR4bits_T5CKR            ' Assign Timer5 External Clock (T5CK) to the corresponding RPn Pin
$define cIn_Fn_IC1  RPINR7bits_IC1R              ' Assign Input Capture 1 (IC1) to the corresponding RPn Pin
$define cIn_Fn_IC2  RPINR7bits_IC2R              ' Assign Input Capture 2 (IC2) to the corresponding RPn Pin
$define cIn_Fn_IC7  RPINR10bits_IC7R             ' Assign Input Capture 7 (IC7) to the corresponding RPn Pin
$define cIn_Fn_IC8  RPINR10bits_IC8R             ' Assign Input Capture 8 (IC8) to the corresponding RPn Pin
$define cIn_Fn_OCFA  RPINR11bits_OCFAR           ' Assign Output Capture A (OCFA) to the corresponding RPn Pin
$define cIn_Fn_QEA1  RPINR14bits_QEA1R           ' Assign A (QEA) to the corresponding pin
$define cIn_Fn_QEB1  RPINR14bits_QEB1R           ' Assign B (QEB) to the corresponding pin
$define cIn_Fn_QEI1  RPINR15bits_INDX1R          ' Assign QEI INDEX (INDX) to the corresponding RPn Pin
$define cIn_Fn_QEA2  RPINR16bits_QEA2R           ' Assign A (QEA) to the corresponding pin
$define cIn_Fn_QEB2  RPINR16bits_QEB2R           ' Assign B (QEB) to the corresponding pin
$define cIn_Fn_QEI2  RPINR17bits_INDX2R          ' Assign QEI INDEX (INDX) to the corresponding RPn Pin
$define cIn_Fn_U1RX  RPINR18bits_U1RXR           ' Assign UART1  Receive (U1RX) to the corresponding RPn Pin
$define cIn_Fn_U1CTS  RPINR18bits_U1CTSR         ' Assign UART1 Clear to Send (U1CTS) to the corresponding RPn Pin
$define cIn_Fn_U2RX  RPINR19bits_U2RXR           ' Assign UART2  Receive (U2RX) to the corresponding RPn Pin
$define cIn_Fn_U2CTS  RPINR19bits_U2CTSR         ' Assign UART2 Clear to Send (U2CTS) to the corresponding RPn Pin
$define cIn_Fn_SDI1  RPINR20bits_SDI1R           ' Assign SPI1 Data Input (SDI1) to the corresponding RPn Pin
$define cIn_Fn_SCK1  RPINR20bits_SCK1R           ' Assign SPI1 Clock Input (SCK1IN) to the corresponding RPn Pin
$define cIn_Fn_SS1  RPINR21bits_SS1R             ' Assign SPI1 Slave Select Input (SS1IN) to the corresponding RPn Pin
$define cIn_Fn_SDI2  RPINR22bits_SDI2R           ' Assign SPI2 Data Input (SDI2) to the corresponding RPn Pin
$define cIn_Fn_SCK2  RPINR22bits_SCK2R           ' Assign SPI2 Clock Input (SCK2IN) to the corresponding RPn Pin
$define cIn_Fn_SS2  RPINR23bits_SS2R             ' Assign SPI2 Slave Select Input (SS2IN) to the corresponding RPn Pin
$define cIn_Fn_CSDI  RPINR24bits_CSDIR           ' Assign DCI Serial Data Input (CSDIN) to the corresponding RPn Pin
$define cIn_Fn_CSCK  RPINR24bits_CSCKR           ' Assign DCI Serial Clock Input (CSCKIN) to the corresponding RPn Pin
$define cIn_Fn_COFS  RPINR25bits_COFSR           ' Assign DCI Frame Sync Input (COFSIN) to the corresponding RPn Pin
$define cIn_Fn_C1RX  RPINR26bits_C1RXR           ' Assign ECAN1  Receive Input (C1RX) to the corresponding RPn Pin
'
'--------------------------------------------------------------------------------------
'[Remappable Peripheral Outputs]
'
$define cOut_Fn_NULL $00                        ' RPn tied to default port pin
$define cOut_Fn_U1TX $01                    ' RPn tied to Comparator1 Output
$define cOut_Fn_U2TX $03                    ' RPn tied to Comparator2 Output
$define cOut_Fn_SDO2 $08                    ' RPn tied to UART1 Transmit
$define cOut_Fn_SCK2 $09                    ' RPn tied to UART1  Ready To Send
$define cOut_Fn_SS2 $0A                     ' RPn tied to UART2 Transmit
$define cOut_Fn_C1TX $0E                    ' RPn tied to SPI1 Data Output
$define cOut_Fn_OC1 $10                     ' RPn tied to SPI1 Clock Output
$define cOut_Fn_OC2 $11                     ' RPn tied to SPI1 Slave Select Output
$define cOut_Fn_OC3 $12                     ' RPn tied to SPI2 Data Output
$define cOut_Fn_OC4 $13                     ' RPn tied to SPI2 Clock Output
$define cOut_Fn_C1OUT $18                   ' RPn tied to SPI2 Slave Select Output
$define cOut_Fn_C2OUT $19                   ' RPn tied to DCI Serial Data Output
$define cOut_Fn_C3OUT $1A                   ' RPn tied to DCI Serial Clock Output
$define cOut_Fn_SYNCO1 $2D                  ' RPn tied to DCI Frame Sync Output
$define cOut_Fn_QEI1CCMP $2F                ' RPn tied to ECAN1 Transmit
$define cOut_Fn_REFCLKO $31                 ' RPn tied to Output Compare 1
$define cOut_Fn_C4OUT $32                   ' RPn tied to Output Compare 2

$define cOut_Pin_RP20  RPOR0bits_RP20R       ' Assign RP20 as Output Pin
$define cOut_Pin_RP35  RPOR0bits_RP35R       ' Assign RP35 as Output Pin
$define cOut_Pin_RP36  RPOR1bits_RP36R       ' Assign RP36 as Output Pin
$define cOut_Pin_RP37  RPOR1bits_RP37R       ' Assign RP37 as Output Pin
$define cOut_Pin_RP38  RPOR2bits_RP38R       ' Assign RP38 as Output Pin
$define cOut_Pin_RP39  RPOR2bits_RP39R       ' Assign RP39 as Output Pin
$define cOut_Pin_RP40  RPOR3bits_RP40R       ' Assign RP40 as Output Pin
$define cOut_Pin_RP41  RPOR3bits_RP41R       ' Assign RP41 as Output Pin
$define cOut_Pin_RP42  RPOR4bits_RP42R       ' Assign RP42 as Output Pin
$define cOut_Pin_RP43  RPOR4bits_RP43R       ' Assign RP43 as Output Pin
$define cOut_Pin_RP54  RPOR5bits_RP54R       ' Assign RP54 as Output Pin
$define cOut_Pin_RP55  RPOR5bits_RP55R       ' Assign RP55 as Output Pin
$define cOut_Pin_RP56  RPOR6bits_RP56R       ' Assign RP56 as Output Pin
$define cOut_Pin_RP57  RPOR6bits_RP57R       ' Assign RP57 as Output Pin
$define cOut_Pin_RP97  RPOR7bits_RP97R       ' Assign RP97 as Output Pin
$define cOut_Pin_RP118  RPOR8bits_RP118R     ' Assign RP118 as Output Pin
$define cOut_Pin_RP120  RPOR9bits_RP120R     ' Assign RP120 as Output Pin
'[PPS Defs End]-----------------------------------------------------------------------
'
'-------------------------------------------------------------------------------------
' Macro         : PPS_Unlock
' Overview:     : Unlock Peripheral Pin Select
' Parameters    : None
' Note          : None
'
$define PPS_Unlock()      '
    OSCCON.Byte0 = $46    '
    OSCCON.Byte0 = $57    '
    OSCCONbits_IOLOCK = 1
'
'-------------------------------------------------------------------------------------
' Macro         : PPS_Lock
' Overview:     : Lock Peripheral Pin Select
' Parameters    : None
' Note          : None
'
$define PPS_Lock()        '
    OSCCON.Byte0 = $46    '
    OSCCON.Byte0 = $57    '
    OSCCONbits_IOLOCK = 0
'
'-------------------------------------------------------------------------------------
' Macro         : PPS_Input(pPin, pFunction)
' Overview:     : The macro assigns a given pin as input pin by configuring register RPINRx.
' Parameters    : pFunction - function to be assigned for particular pin
'                   cIn_Fn_TxCK
'                   cIn_Fn_INTx
'                   cIn_Fn_ICx
'                   cIn_Fn_OCFx
'                   cIn_Fn_UxRX
'                   cIn_Fn_UxCTS
'                   cIn_Fn_SDIx
'                   cIn_Fn_SCKxIN
'                   cIn_Fn_SSxIN
'               : pPin - pin number(x) for which functionality has to be assigned
'                   cIn_Pin_RPx
' Note          : None
'
$define PPS_Input(pPin, pFunction) pFunction = pPin
'
'--------------------------------------------------------------------------------------
' Macro         : PPS_Output(pPin, pFunction)
' Overview      : The macro assigns a given pin as output pin by configuring register RPORx.
' Parameters    : pPin - pin number(x) for which functionality has to be assigned
'                   ccOut_Pin_RPx
'               : pFunction - function to be assigned for particular pin
'                   cOut_Fn_NULL
'                   cOut_Fn_CxOUT
'                   cOut_Fn_UxTX
'                   cOut_Fn_UxRTS
'                   cOut_Fn_SDOx
'                   cOut_Fn_SCKxOUT
'                   cOut_Fn_SSxOUT
'                   cOut_Fn_OCx
'                   cOut_Fn_CTMU
'                   etc.....
' Note          : None
'
$define PPS_Output(pPin, pFunction) pPin = pFunction

'----------------------------------------------------------------------------------
' Unlock the OSCCON SFR and write a new value to it
' Input     : WREG0 holds the value to write to OSCCON
' Output    : None
' Notes     : 1). Disable interrupts for the unlock and write sequence
'           : 2). Execute the unlock sequence for the OSCCON low byte, in two back-to-back instructions:
'           :       • Write $46 to OSCCON<7:0>
'           :       • Write $57 to OSCCON<7:0>
'           : 3). In the instruction immediately following the unlock sequence, write the low byte to OSCCON
'           : 4). Execute the unlock sequence for the OSCCON high byte, in two back-to-back instructions:
'           :       • Write $78 to OSCCON<15:8>
'           :       • Write $9A to OSCCON<15:8>
'           : 5). In the instruction immediately following the unlock sequence, write the high byte to OSCCON
'
$define Write_OSCCONL(pValue)   '
    Disi #7                     '
    WREG0 = pValue              '
    WREG1 = AddressOf(OSCCON.Byte0) '
    WREG2 = $46                 '
    WREG3 = $57                 '
    Mov.b W2,[W1]               '
    Mov.b W3,[W1]               '
    Mov.b W0,[W1]

$define Write_OSCCONH(pValue)   '
    Disi #7                     '
    WREG0 = pValue              '
    WREG1 = AddressOf(OSCCON.Byte1) '
    WREG2 = $78                 '
    WREG3 = $9A                 '
    Mov.b W2,[W1]               '
    Mov.b W3,[W1]               '
    Mov.b W0,[W1]

$define Write_OSCCON(pValue)    '
    Disi #14                    '
    WREG0 = pValue.Byte1        '
    WREG1 = AddressOf(OSCCON.Byte1) '
    WREG2 = $78                 '
    WREG3 = $9A                 '
    Mov.b W2,[W1]               '
    Mov.b W3,[W1]               '
    Mov.b W0,[W1]               '
    WREG0 = pValue.Byte0        '
    WREG1 = AddressOf(OSCCON.Byte0) '
    WREG2 = $46                 '
    WREG3 = $57                 '
    Mov.b W2,[W1]               '
    Mov.b W3,[W1]               '
    Mov.b W0,[W1]
'
'-------------------------------------------------------------------------------------
' Alter the oscillator on PIC24E or PIC24H or dsPIC33E devices
' Input     : pM represents the 9 PLLDIV bits of the PLLFBD register
'           : pN1 represents the 5 PLLPRE bits of the CLKDIV register
'           : pN2 represents the 2 PLLPOST bits of the CLKDIV register
'           : pOSCCON is the value to write to the 16-bit OSCCON SFR
' Output    : None
' Notes     : The calculation for the oscillator setup is:
'               Fosc = Fin * M / (N1 * N2), Fcy = (Fosc / 2)
'               Example:
'               Fosc = 7.37 * 43 / (2 * 2) = 79.23MHz
'
$define PLL_Setup(pM, pN1, pN2, pOSCCON) '
    CLKDIV = pN1 - 2            '
    $if (pN2 = 2)               '
        $if ($eval(pN1 - 2) > 0)   '
            CLKDIVbits_PLLPOST0 = 0 '
            CLKDIVbits_PLLPOST1 = 0 '
        $endif                      '
    $elseif (pN2 = 4)           '
        CLKDIVbits_PLLPOST0 = 1 '
        CLKDIVbits_PLLPOST1 = 0 '
    $elseif (pN2 = 8)           '
        CLKDIVbits_PLLPOST0 = 1 '
        CLKDIVbits_PLLPOST1 = 1 '
    $endif                      '
    PLLFBD = pM - 2             '
    Write_OSCCON(pOSCCON)       '
    While OSCCONbits_lock <> 1 : Wend
'
'-------------------------------------------------------------------------------------
' Alter the PLLDIV bits on PIC24E or PIC24H or dsPIC33E devices
' Input     : pM represents the 9 PLLDIV bits of the PLLFBD register
' Output    : None
' Notes     : The calculation for the oscillator setup is:
'               Fosc = Fin * M / (2 * 2), Fcy = (Fosc / 2)
'               Example:
'               Fosc = 7.37 * 43 / (2 * 2) = 79.23MHz
'           : Does not manipulate the OSCCON SFR
'
$define OSC_PLLDIV(pM) '
    CLKDIV = 0         '
    PLLFBD = (pM - 2)
'
'----------------------------------------------------------------------------------
' Make analogue pins digital
' This section may be added too for extra SFRs
'
#IfnSym __SYSCOM_LIBRARY_OFF_       ' Has the library been disabled in the compiler?
    ANSELA = 0
    ANSELB = 0
#EndIfSym
'
'----------------------------------------------------------------------------------
' Pin Numbers for PORTA
'
$define Pin_A0 0
$define Pin_A1 1
$define Pin_A2 2
$define Pin_A3 3
$define Pin_A4 4
$define Pin_A5 5
$define Pin_A6 6
$define Pin_A7 7
$define Pin_A8 8
$define Pin_A9 9
$define Pin_A10 10
$define Pin_A11 11
$define Pin_A12 12
$define Pin_A13 13
$define Pin_A14 14
$define Pin_A15 15
'
' Pin Numbers for PORTB
'
$define Pin_B0 16
$define Pin_B1 17
$define Pin_B2 18
$define Pin_B3 19
$define Pin_B4 20
$define Pin_B5 21
$define Pin_B6 22
$define Pin_B7 23
$define Pin_B8 24
$define Pin_B9 25
$define Pin_B10 26
$define Pin_B11 27
$define Pin_B12 28
$define Pin_B13 29
$define Pin_B14 30
$define Pin_B15 31
'
' Pin Numbers for PORTC
'
$define Pin_C0 32
$define Pin_C1 33
$define Pin_C2 34
$define Pin_C3 35
$define Pin_C4 36
$define Pin_C5 37
$define Pin_C6 38
$define Pin_C7 39
$define Pin_C8 40
$define Pin_C9 41
$define Pin_C10 42
$define Pin_C11 43
$define Pin_C12 44
$define Pin_C13 45
$define Pin_C14 46
$define Pin_C15 47
'
' Pin Numbers for PORTD
'
$define Pin_D0 48
$define Pin_D1 49
$define Pin_D2 50
$define Pin_D3 51
$define Pin_D4 52
$define Pin_D5 53
$define Pin_D6 54
$define Pin_D7 55
$define Pin_D8 56
$define Pin_D9 57
$define Pin_D10 58
$define Pin_D11 59
$define Pin_D12 60
$define Pin_D13 61
$define Pin_D14 62
$define Pin_D15 63
'
' Pin Numbers for PORTE
'
$define Pin_E0 64
$define Pin_E1 65
$define Pin_E2 66
$define Pin_E3 67
$define Pin_E4 68
$define Pin_E5 69
$define Pin_E6 70
$define Pin_E7 71
$define Pin_E8 72
$define Pin_E9 73
$define Pin_E10 74
$define Pin_E11 75
$define Pin_E12 76
$define Pin_E13 77
$define Pin_E14 78
$define Pin_E15 79
'
' Pin Numbers for PORTF
'
$define Pin_F0 80
$define Pin_F1 81
$define Pin_F2 82
$define Pin_F3 83
$define Pin_F4 84
$define Pin_F5 85
$define Pin_F6 86
$define Pin_F7 87
$define Pin_F8 88
$define Pin_F9 89
$define Pin_F10 90
$define Pin_F11 91
$define Pin_F12 92
$define Pin_F13 93
$define Pin_F14 94
$define Pin_F15 95
'
' Pin Numbers for PORTG
'
$define Pin_G0 96
$define Pin_G1 97
$define Pin_G2 98
$define Pin_G3 99
$define Pin_G4 100
$define Pin_G5 101
$define Pin_G6 102
$define Pin_G7 103
$define Pin_G8 104
$define Pin_G9 105
$define Pin_G10 106
$define Pin_G11 107
$define Pin_G12 108
$define Pin_G13 109
$define Pin_G14 110
$define Pin_G15 111
'
' Pin Numbers for PORTH
'
$define Pin_H0 112
$define Pin_H1 113
$define Pin_H2 114
$define Pin_H3 115
$define Pin_H4 116
$define Pin_H5 117
$define Pin_H6 118
$define Pin_H7 119
$define Pin_H8 120
$define Pin_H9 121
$define Pin_H10 122
$define Pin_H11 123
$define Pin_H12 124
$define Pin_H13 125
$define Pin_H14 126
$define Pin_H15 127
'
' Pin Numbers for PORTJ
'
$define Pin_J0 128
$define Pin_J1 129
$define Pin_J2 130
$define Pin_J3 131
$define Pin_J4 132
$define Pin_J5 133
$define Pin_J6 134
$define Pin_J7 135
$define Pin_J8 136
$define Pin_J9 137
$define Pin_J10 138
$define Pin_J11 139
$define Pin_J12 140
$define Pin_J13 141
$define Pin_J14 142
$define Pin_J15 143
'-----------------------------------------------------------------------------------
$endif
